Asus M2N-MX DVI2 User Manual - Page 57

Configure DRAM Timing by SPD [Enabled] When this item is enabled, the DRAM timing parameters are set according to the DRAM SPD (Serial Presence Detect). When disabled, you can manually set the DRAM timing parameters through the DRAM sub-items. The following sub-items appear when this item is Disabled. Configuration options: [Enabled] [Disabled] DRAM CAS# Latency [5] Controls the latency between the SDRAM read command and the time the data actually becomes available. Configuration options: [3] [4] [5] [6] DRAM RAS# to CAS# Delay [6 DRAM Clocks] Controls the latency between the DDR SDRAM active command and the read/write command. Configuration options: [2 DRAM Clocks] [3 DRAM Clocks] [4 DRAM Clocks] [5 DRAM Clocks] [6 DRAM Clocks] DRAM RAS# Precharge [6 DRAM Clocks] Controls the idle clocks after issuing a precharge command to the DDR SDRAM. Configuration options: [2 DRAM Clocks] [3 DRAM Clocks] [4 DRAM Clocks] [5 DRAM Clocks] [6 DRAM Clocks] DRAM RAS# Activate to Precha [15 DRAM Clocks] Configuration options: [4 DRAM Clocks] [5 DRAM Clocks]...[18 DRAM Clocks] DRAM Write Recovery Time [4 Clocks] Set the write recovery timing. DRAM TRFC [30 DRAM Clocks] Configuration options: [20 DRAM Clocks] [25 DRAM Clocks] [30 DRAM Clocks] [35 DRAM Clocks] [42 DRAM Clocks] DRAM TRRD [10] Configuration options: [10] Initiate Graphic Adapter [PEG/PCI] Allows you to select the graphics controller as the primary boot device. Configuration options: [PCI/PEG] [PEG/PCI] Initiate Graphic Mode Select [Enabled, 8MB] Allows you to select the amount of system memory used by the Internal graphics device. Configuration options: [Disabled] [Enabled,1MB] [Enabled, 8MB] PEG Force x1 [Disabled] Configuration options: [Enabled] [Disabled] ASUS M2N-MX 2-19