Asus P5W64 WS PRO Motherboard Installation Guide - Page 5

Main menu, Ai Tweaker menu, Advanced menu

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Contents 4.3 Main menu 4-12 4.3.1 System Time 4-12 4.3.2 System Date 4-12 4.3.3 Legacy Diskette A 4-12 4.3.4 Language 4-12 4.3.5 SATA 1~6 4-13 4.3.6 SATA Configuration 4-14 4.3.7 AHCI Configuration 4-15 4.3.8 System Information 4-16 4.4 Ai Tweaker menu 4-17 4.4.1 Ai Overclock Tuner 4-17 4.4.2 CPU Ratio Setting 4-18 4.4.3 FSB Strap to North Bridge 4-18 4.4.4 DRAM Frequency 4-19 4.4.5 DRAM Command Rate 4-19 4.4.6 DRAM CMD Skew on Channel A/B 4-20 4.4.7 DRAM CLK Skew on Channel A/B 4-20 4.4.8 DRAM Timing Control 4-20 4.4.9 DRAM Static Read Control 4-22 4.4.10 DRAM Dynamic Write Control 4-22 4.4.11 Ai Clock Twister 4-22 4.4.12 Ai Transaction Booster 4-22 4.4.13 CPU Voltage 4-22 4.4.14 CPU PLL Voltage 4-23 4.4.15 FSB Termination Voltage 4-23 4.4.16 DRAM Voltage 4-23 4.4.17 NB Voltage 4-23 4.4.18 SB Voltage 4-24 4.4.19 Clock Over-Charging Voltage 4-24 4.4.20 Load-Line Calibration 4-24 4.4.21 CPU GTL Voltage Reference 4-24 4.4.22 NB GTL Voltage Reference 4-24 4.4.23 CPU Spread Spectrum 4-24 4.4.24 PCIE Spread Spectrum 4-24 4.5 Advanced menu 4-25 

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v
Contents
4.3
Main menu
..................................................................................
4-12
4.3.1
System Time
.................................................................
4-12
4.3.2
System Date
.................................................................
4-12
4.3.3
Legacy Diskette A
.........................................................
4-12
4.3.4
Language
......................................................................
4-12
4.3.5
SATA 1~6
......................................................................
4-13
4.3.6
SATA Configuration
.......................................................
4-14
4.3.7
AHCI Configuration
.......................................................
4-15
4.3.8
System Information
.......................................................
4-16
4.4
Ai Tweaker menu
........................................................................
4-17
4.4.1
Ai Overclock Tuner
.......................................................
4-17
4.4.2
CPU Ratio Setting
........................................................
4-18
4.4.3
FSB Strap to North Bridge
...........................................
4-18
4.4.4
DRAM Frequency
........................................................
4-19
4.4.5
DRAM Command Rate
................................................
4-19
4.4.6
DRAM CMD Skew on Channel A/B
.............................
4-20
4.4.7
DRAM CLK Skew on Channel A/B
...............................
4-20
4.4.8
DRAM Timing Control
..................................................
4-20
4.4.9
DRAM Static Read Control
..........................................
4-22
4.4.10
DRAM Dynamic Write Control
......................................
4-22
4.4.11
Ai Clock Twister
............................................................
4-22
4.4.12
Ai Transaction Booster
.................................................
4-22
4.4.13
CPU Voltage
...............................................................
4-22
4.4.14
CPU PLL Voltage
.........................................................
4-23
4.4.15
FSB Termination Voltage
..............................................
4-23
4.4.16
DRAM Voltage
.............................................................
4-23
4.4.17
NB Voltage
...................................................................
4-23
4.4.18
SB Voltage
...................................................................
4-24
4.4.19
Clock Over-Charging Voltage
......................................
4-24
4.4.20
Load-Line Calibration
...................................................
4-24
4.4.21
CPU GTL Voltage Reference
.......................................
4-24
4.4.22
NB GTL Voltage Reference
..........................................
4-24
4.4.23
CPU Spread Spectrum
................................................
4-24
4.4.24
PCIE Spread Spectrum
................................................
4-24
4.5
Advanced menu
.........................................................................
4-25