Compaq W8000 Hyper-Threading Technology, New Feature of Intel Xeon Processor - Page 5

give the same priority to each thread and depending on how the code is written, using Spin-loops - cpu

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Hyper-Threading Technology, New Feature of Intel Xeon Processor White Paper 5 Using Hyper-Threading technology, Instruction-Level Parallelism can boost performance from a processor by utilizing otherwise idle resources. (See Figure 3.) For simplicity, assume that there are only three Executing units: A, B, and C, and only two threads: T1 and T2. In a single processor system, usually the T2 thread has to wait until the T1 thread is finished since the system can only execute one thread at a time. The MP system has more than one processor that the OS can use to launch TLP, so the T1 thread runs on one CPU and dispatches the T2 thread to another CPU. Hyper-Threading technology can allow up to two active threads in the pipeline. Since it shares the same rapid execution engine, each thread will need to arbitrate to use the resources in case of conflict. The T1 thread with µop (micro-op) A1 will need to compete with the T2 thread because both threads would have to use the same execution unit A at the same time. Hyper-Threading will give the same priority to each thread and depending on how the code is written, (using Spin-loops [8]*) one will win over the other. Ideally, it could perform as well as MP system configuration but, on an average, Intel claims that there is a 30% performance boost in some applications. Note: *Numbers in brackets throughout this paper refer to documents listed in the References section of this paper. 167T-0202A-WWEN

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Hyper-Threading Technology, New Feature of Intel Xeon Processor White Paper
5
167T-0202A-WWEN
Using Hyper-Threading technology, Instruction-Level Parallelism can boost performance from a
processor by utilizing otherwise idle resources. (See Figure 3.) For simplicity, assume that there
are only three Executing units: A, B, and C, and only two threads: T1 and T2. In a single
processor system, usually the T2 thread has to wait until the T1 thread is finished since the system
can only execute one thread at a time. The MP system has more than one processor that the OS
can use to launch TLP, so the T1 thread runs on one CPU and dispatches the T2 thread to another
CPU.
Hyper-Threading technology can allow up to two active threads in the pipeline. Since it shares the
same rapid execution engine, each thread will need to arbitrate to use the resources in case of
conflict. The T1 thread with μop (micro-op) A1 will need to compete with the T2 thread because
both threads would have to use the same execution unit A at the same time. Hyper-Threading will
give the same priority to each thread and depending on how the code is written, (using Spin-loops
[8]*) one will win over the other. Ideally, it could perform as well as MP system configuration
but, on an average, Intel claims that there is a 30% performance boost in some applications.
Note:
*Numbers in brackets throughout this paper refer to documents listed in the
References
section of this paper.