HP DL360 Fully-Buffered DIMM technology in HP ProLiant servers

HP DL360 - ProLiant - G3 Manual

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  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 1
    Fully-Buffered DIMM technology in HP ProLiant servers technology brief Abstract...2 Introduction...2 Performance barriers for traditional DIMM 2 Fully-Buffered DIMM architecture ...4 Benefits...6 Simplified board design ...6 Higher memory capacity ...6 Higher performance...7 Improved reliability
  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 2
    memory module (FB-DIMM) technology. It also provides rules for populating FB-DIMM slots to achieve maximum performance in HP ProLiant servers. Introduction HP ProLiant servers results in circuitous traces on the motherboard between the memory controller and memory slots. Both the latency (delay)
  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 3
    channel that can be supported as the bus speed increases. For example, Figure 2 shows the number of loads supported per channel at data servers require an improved memory architecture to achieve higher memory bandwidth and capacity. Consequently, JEDEC3 developed the Fully-Buffered DIMM specification
  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 4
    Fully-Buffered DIMM architecture The FB-DIMM architecture has serial links between the memory controller and the FB-DIMMs, which are connected in a daisy chain configuration (Figure 3). Relative to the memory controller, there are 10 outbound links and 14 inbound links, also known as southbound and
  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 5
    data from the DRAM devices and transmits it to the memory controller through the inbound links. Inbound and outbound serial information is the peak theoretical throughput of both the DRAM devices and the inbound links is 4.3 GB/sec. Each outbound frame is 120 bits (15 bytes) long and consists of
  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 6
    traces do not add to overall routing complexity. In addition, the memory controller and AMB can compensate for signal traces of unequal length, thus to Memory technology evolution: an overview of system memory technologies technology brief at http://h18004.www1.hp.com/products/servers/technology/
  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 7
    memory controller and AMB enable higher performance by the memory GB/sec, or approximately one-half of 4.3-GB/s GB/s (2.1 GB/s plus 4.3 GB/s). When using DDR2-667 DRAM, the total theoretical throughput of the FB-DIMM channel is 8.0 GB/s (2.7 GB/s plus 5.3 GB error could disrupt server performance and
  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 8
    FB-DIMM and allow it to be cooled more efficiently by the server's internal fans. To estimate the power consumption for all current HP ProLiant servers that support FB-DIMMs, use the power calculators at http://www.hp.com/configurator/calc/Power Calculator Catalog.xls. Figure 7. FB-DIMM with full
  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 9
    of sixteen 512MB DIMMs will improve performance. This has the added benefit of using less power per GB of memory. Also, when configuring memory, keep the channels balanced to minimize the latency per channel-latency increases with each additional set of FB-DIMMs. Conclusion HP supports the FB-DIMM
  • HP DL360 | Fully-Buffered DIMM technology in HP ProLiant servers - Page 10
    Hyperlink JEDEC Web site http://www.jedec.org HP Advanced Memory Protection Memory technology evolution http://h18004.www1.hp.com/products/servers/technology/whitepapers/advtechnology.html http://h18004.www1.hp.com/products/servers/technology/whitepapers/advtechnology.html Call to action Send
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Fully-Buffered DIMM technology in HP ProLiant servers
technology brief
Abstract
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2
Introduction
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2
Performance barriers for traditional DIMM
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2
Fully-Buffered DIMM architecture
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4
Benefits
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6
Simplified board design
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6
Higher memory capacity
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6
Higher performance
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7
Improved reliability
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7
Challenges
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8
Latency
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8
Power and thermal loads
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8
Performance tuning, achieving maximum performance
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9
Conclusion
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9
For more information
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10
Call to action
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10