HP DL360 Fully-Buffered DIMM technology in HP ProLiant servers - Page 4

Fully-Buffered DIMM architecture

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Fully-Buffered DIMM architecture The FB-DIMM architecture has serial links between the memory controller and the FB-DIMMs, which are connected in a daisy chain configuration (Figure 3). Relative to the memory controller, there are 10 outbound links and 14 inbound links, also known as southbound and northbound links, respectively. These serial links connect the memory controller to an advanced memory buffer (AMB) chip that resides on each FB-DIMM, creating a point-to-point architecture. The outbound links transmit commands and write data to the FB-DIMMs while the inbound links transmit read data back to the memory controller. The clock signal is distributed over a different set of pins, and the memory controller communicates with each AMB over the SMBus. Figure 3. Serial communication between daisy-chained FB-DIMMs on a single channel. 4

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Fully-Buffered DIMM architecture
The FB-DIMM architecture has serial links between the memory controller and the FB-DIMMs, which
are connected in a daisy chain configuration (Figure 3). Relative to the memory controller, there are
10 outbound links and 14 inbound links, also known as southbound and northbound links,
respectively. These serial links connect the memory controller to an advanced memory buffer (AMB)
chip that resides on each FB-DIMM, creating a point-to-point architecture. The outbound links transmit
commands and write data to the FB-DIMMs while the inbound links transmit read data back to the
memory controller.
The clock signal is distributed over a different set of pins, and the memory controller communicates
with each AMB over the SMBus.
Figure 3.
Serial communication between daisy-chained FB-DIMMs on a single channel.
4