Intel E5345 Specification Update - Page 16

Identification Information Component Identification via Programming Interface The Quad-Core Intel® Xeon® Processor 5300 Series stepping can be identified by the following register contents: Family1 0110 Model2 1111 Note: 1. 2. The Family corresponds to bits [11:8] of the EDX register after RESET, bits [11:8] of the EAX register after the CPUID instruction is executed with a 1 in the EAX register, and the generation field of the Device ID register accessible through Boundary Scan. The Model corresponds to bits [7:4] of the EDX register after RESET, bits [7:4] of the EAX register after the CPUID instruction is executed with a 1 in the EAX register, and the model field of the Device ID register accessible through Boundary Scan. Cache and TLB descriptor parameters are provided in the EAX, EBX, ECX and EDX registers after the CPUID instruction is executed with a 2 in the EAX register. Component Marking Information Figure 1. Processor Top-side Markings (Example) GROUP1LINE1 GROUP1LINE2 GROUP1LINE3 GROUP1LINE4 GROUP1LINE5 Legend: GROUP1LINE1 GROUP1LINE2 GROUP1LINE3 GROUP1LINE4 GROUP1LINE5 Mark Text (Production Mark): 2.66GHZ/8M/1333 Intel ® Xeon® SXXX XXXXX i (M) © '05 x53XX (FPO) Table 1. LAOTTPONO S/N The Quad-Core Intel® Xeon® Processor 5300 Series stepping can be identified by the following component markings: Intel® Xeon® Processor 5300 Series Identification Information (Sheet 1 of 2) Processor S-Spec Number Core Stepping CPUID Core Freq (GHz) Data Bus Freq (MHz) L2 Cache Size Processor Package Revision Notes SL9YM SLAC4 SL9YL X5355 X5355 E5345 B-3 06F7 2.66 1333 8M 01 B-3 06F7 2.66 1333 8M 01 B-3 06F7 2.33 1333 8M 01 1,2 3,6,7,8,9 1,2 3,6,7,8,9 1,2 4,6,7,8,9 16 Intel® Xeon® Processor 5300 Series Specification Update, December 2010