Pioneer DVL-909 Service Guide - Page 33

Srm2b256slmx70 Dvdm Assy : Ic502

Page 33 highlights

DV-505, DVL-909, DV-S9 SRM2B256SLMX70 (DVDM ASSY : IC502) • 256 K SRAM (For Mechanism Control IC) • Block Diagram A0 10 A1 9 A2 8 A3 7 A4 6 A5 5 A6 4 A7 3 A8 25 A9 24 A10 21 A11 23 A12 2 A13 26 A14 1 Address Buffer 9 Line 512 Decoder 6 Row 64 Decoder CS 20 CS Control Logic Memory-Cell Array 512×64×8 64×8 Row Gate 8 OE 22 WE 27 OE, WE Control Logic 14 18 I/O Buffer 11 12 13 15 16 17 18 19 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 VDD Vss • Pin Function No. Pin Name 1 A14 2 A12 3 A7 4 A6 5 A5 6 A4 7 A3 8 A2 9 A1 10 A0 11 I/O1 12 I/O2 13 I/O3 14 VSS Function Address input Data input/output GND (0V) No. Pin Name 15 I/O4 16 I/O5 17 I/O6 18 I/O7 19 I/O8 20 CS 21 A10 22 OE 23 A11 24 A9 25 A8 26 A13 27 WE 28 VDD Function Data input/output Chip select Address input Output enable Address input Write enable Power supply (2.7 to 5.5V) 33

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47

33
DV-505, DVL-909, DV-S9
SRM2B256SLMX70 (DVDM ASSY : IC502)
• 256 K SRAM (For Mechanism Control IC)
Block Diagram
Pin Function
10
9
8
7
6
5
4
3
25
24
21
23
2
26
1
Address Buffer
A0
A1
A2
A3
A4
9
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
20
CS
512
64
×
8
Line
Decoder
Memory-Cell
Array
512
×
64
×
8
6
8
Row
Decoder
64
Row Gate
Control
Logic
Control
Logic
I/O Buffer
22
OE
27
11
WE
Vss
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
V
DD
CS
OE,
WE
12
14
18
13
15
16
17
18
19
.
o
N
e
m
a
N
n
i
P
n
o
i
t
c
n
u
F
.
o
N
e
m
a
N
n
i
P
n
o
i
t
c
n
u
F
1
4
1
A
t
u
p
n
i
s
s
e
r
d
d
A
5
1
4
O
/
I
t
u
p
t
u
o
/
t
u
p
n
i
a
t
a
D
2
2
1
A
6
1
5
O
/
I
3
7
A
7
1
6
O
/
I
4
6
A
8
1
7
O
/
I
5
5
A
9
1
8
O
/
I
6
4
A
0
2
S
C
t
c
e
l
e
s
p
i
h
C
7
3
A
1
2
0
1
A
t
u
p
n
i
s
s
e
r
d
d
A
8
2
A
2
2
E
O
e
l
b
a
n
e
t
u
p
t
u
O
9
1
A
3
2
1
1
A
t
u
p
n
i
s
s
e
r
d
d
A
0
1
0
A
4
2
9
A
1
1
1
O
/
I
t
u
p
t
u
o
/
t
u
p
n
i
a
t
a
D
5
2
8
A
2
1
2
O
/
I
6
2
3
1
A
3
1
3
O
/
I
7
2
E
W
e
l
b
a
n
e
e
t
i
r
W
4
1
S
S
V
)
V
0
(
D
N
G
8
2
D
D
V
)
V
5
.
5
o
t
7
.
2
(
y
l
p
p
u
s
r
e
w
o
P