ASRock X99 Taichi User Manual - Page 70
Tccd_l, Tccd_wr_l, Trwsr, Trwdd, Twrdd
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tCCD Configure back to back CAS to CAS (i.e. READ to RAED or WRITE to WRITE) from same rank separation parameter. tCCD_L Configure back to back CAS to CAS (i.e. READ to RAED or WRITE to WRITE) from same rank separation parameter. tCCD_WR_L Configure back to back CAS to CAS (i.e. READ to RAED or WRITE to WRITE) from same rank separation parameter. tRWSR Configure READ to WRITE same rank dead cycle Back to back READ to WRITE from same rank separation parameter. tRWDD Configure Read to Write different DIMM dead cycle Back to back READ to WRITE from different DIMM separation parameter. tRWDR Configure Read to Write different rank dead cycle Back to back READ to WRITE from different rank separation parameter. tWRDD Configure Write to Read different DIMM dead cycle Back to back READ to WRITE from different DIMM separation parameter. tWRDR Configure Write to Read different rank dead cycle Back to back READ to WRITE from different rank separation parameter. tWWDD Configure Write to Write different DIMM dead cycle Back to back READ to WRITE from different DIMM separation parameter. tWWDR Configure Write to Write different rank dead cycle Back to back READ to WRITE from different rank separation parameter. 64 English