ASRock X99 Taichi User Manual - Page 71

tRRDD, RTL CH A, RTL offset CH A, IO-L CH A, Configure the round trip latency offset for channel C.

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X99 Taichi tRRDD Configure Read to Read different DIMM dead cycle Back to back READ to WRITE from different DIMM separation parameter. tRRDR Configure Read to Read different rank dead cycle Back to back READ to WRITE from different DIMM separation parameter. RTL (CH A) Configure round trip latency for channel A. RTL (CH B) Configure round trip latency for channel B. RTL (CH C) Configure round trip latency for channel C. RTL (CH D) Configure round trip latency for channel D. RTL offset (CH A) Configure the round trip latency offset for channel A. RTL offset (CH B) Configure the round trip latency offset for channel B. RTL offset (CH C) Configure the round trip latency offset for channel C. IO-L (CH A) Configure IO latency for channel A. IO-L (CH B) Configure IO latency for channel B. IO-L (CH C) Configure IO latency for channel C. IO-L (CH D) Configure IO latency for channel D. 65 English

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English
X99 Taichi
65
tRRDD
Configure Read to Read different DIMM dead cycle Back to back READ to WRITE
from different DIMM separation parameter.
tRRDR
Configure Read to Read different rank dead cycle Back to back READ to WRITE
from different DIMM separation parameter.
RTL (CH A)
Configure round trip latency for channel A.
RTL (CH B)
Configure round trip latency for channel B.
RTL (CH C)
Configure round trip latency for channel C.
RTL (CH D)
Configure round trip latency for channel D.
RTL offset (CH A)
Configure the round trip latency offset for channel A.
RTL offset (CH B)
Configure the round trip latency offset for channel B.
RTL offset (CH C)
Configure the round trip latency offset for channel C.
IO-L (CH A)
Configure IO latency for channel A.
IO-L (CH B)
Configure IO latency for channel B.
IO-L (CH C)
Configure IO latency for channel C.
IO-L (CH D)
Configure IO latency for channel D.