Acer Altos G301 Acer Altos G301 User's Guide - Page 138

Appendix A: AMIBIOS POST Checkpoint Codes, Displaying the Hit

Get Acer Altos G301 PDF manuals and user guides View all Acer Altos G301 manuals
Add to My Manuals
Save this manual to your list of manuals

Page 138 highlights

126 Appendix A: AMIBIOS POST Checkpoint Codes Checkpoint Code Description 37h The display mode is set. Displaying the power on message next. 38h Initializing the bus input, IPL, general devices next, if present. See page 131 for additional information. 39h Displaying bus initialization error messages. See page 131 for additional information. 3Ah The new cursor position has been read and saved. Displaying the Hit message next. 3Bh The Hit message is displayed. The protected mode memory test is about to start. 40h Preparing the descriptor tables next. 42h The descriptor tables are prepared. Entering protected mode for the memory test next. 43h Entered protected mode. Enabling interrupts for diagnostics mode next. 44h Interrupts enabled if the diagnostics switch is on. Initializing data to check memory wraparound at 0:0 next. 45h Data initialized. Checking for memory wraparound at 0:0 and finding the total system memory size next. 46h The memory wraparound test is done. Memory size calculation has been done. Writing patterns to test memory next. 47h The memory pattern has been written to extended memory. Writing patterns to the base 640 KB memory next. 48h Patterns written in base memory. Determining the amount of memory below 1 MB next.

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
  • 140
  • 141
  • 142
  • 143
  • 144
  • 145
  • 146
  • 147
  • 148
  • 149
  • 150
  • 151
  • 152
  • 153
  • 154
  • 155
  • 156
  • 157
  • 158
  • 159
  • 160
  • 161
  • 162
Appendix A: AMIBIOS POST Checkpoint Codes
126
37h
The display mode is set. Displaying the power on
message next.
38h
Initializing the bus input, IPL, general devices next,
if present. See page 131 for additional
information.
39h
Displaying bus initialization error messages. See
page 131 for additional information.
3Ah
The new cursor position has been read and saved.
Displaying the Hit
<DEL>
message next.
3Bh
The Hit
<DEL>
message is displayed. The protected
mode memory test is about to start.
40h
Preparing the descriptor tables next.
42h
The descriptor tables are prepared. Entering
protected mode for the memory test next.
43h
Entered protected mode. Enabling interrupts for
diagnostics mode next.
44h
Interrupts enabled if the diagnostics switch is on.
Initializing data to check memory wraparound at
0:0 next.
45h
Data initialized. Checking for memory wraparound
at 0:0 and finding the total system memory size
next.
46h
The memory wraparound test is done. Memory size
calculation has been done. Writing patterns to test
memory next.
47h
The memory pattern has been written to extended
memory. Writing patterns to the base 640 KB
memory next.
48h
Patterns written in base memory. Determining the
amount of memory below 1 MB next.
Checkpoint Code
Description