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JTAG Boundary-Scan

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Dell 8.19 JTAG Boundary-Scan Ibex Peak adds the industry standard JTAG interface and enables Boundary-Scan in place of the XOR chains used in previous generations of the Ibex Peak. Boundary-Scan can be used to ensure device connectivity during the board manufacturing process. The JTAG interface allows system manufacturers to improve efficiency by using industry available tools to test the Ibex Peak on an assembled board. Since JTAG is a serial interface, it eliminates the need to create probe points for every pin in an XOR chain. This eases pin breakout and trace routing and simplifies the interface between the system and a bed-of-nails tester. PowerEdge R210 Technical Guide 38

Section	Page
1 Product Comparison	7
2 New Technologies	11
2.1 Overview	11
2.2 Detailed Information	11
2.2.1 System Management	11
2.2.2 Software RAID	11
2.2.3 eSATA	13
3 System Overview	14
4 Mechanical	16
4.1 Chassis Description	16
4.2 Dimensions and Weight	16
4.3 Front Panel View and Features	17
4.4 Back Panel View and Features	18
4.5 Power Supply Indicators	18
4.5.1 Power Button LED	18
4.5.2 System Status/ID LED	18
4.6 NIC Indicators	18
4.7 Side View	19
4.8 Internal Chassis View	20
4.9 Rails	21
4.10 Fans	22
4.11 Control Panel LED	22
4.12 Security	22
4.12.1 Top Cover Lock Mechanism	22
4.12.2 Bezel	22
4.12.3 Trusted Platform Module (TPM)	22
4.12.4 Power Switch Security	23
4.12.5 Intrusion Alert	23
4.12.6 Secure Mode	24
4.13 USB Ports	24
4.14 Battery	24
4.15 Field Replaceable Units (FRU)	25
4.16 User Accessible Jumpers, Sockets, and Connectors	25
5 Power, Thermal, Acoustic	26
5.1 Power Supplies	26
5.2 Power Supply Connectors on the Planar	26
5.3 Environmental Specifications	27
5.3.1 Temperature	27
5.3.2 Relative Humidity	27
5.3.3 Maximum Vibration	27
5.3.4 Maximum Shock	27
5.3.5 Altitude	27
5.3.6 Airborne Contaminant Level	27
5.4 Power Supply Unit (PSU) Specifications	28
5.5 ENERGY STAR® Compliance	28
5.6 Thermal	28
5.7 Acoustics	29
6 Processors	31
6.1 Overview	31
6.2 Supported Processors	31
6.3 Processor Configurations	31
7 Memory	32
7.1 Overview	32
7.2 DIMMs Supported	32
7.3 Slots/Risers	33
7.4 Speed	33
7.5 Sparing	33
7.6 Mirroring	33
7.7 RAID	33
8 Chipset	34
8.1 Overview	34
8.2 Direct Media Interface	34
8.3 PCI Express Interface	34
8.4 SATA Interface	34
8.5 AHCI	34
8.6 PCI Interface	34
8.7 Low Pin Count (LPC) Interface	35
8.8 Serial Peripheral Interface (SPI)	35
8.9 Compatibility Module	35
8.10 Advanced Programmable Interrupt Controller (APIC)	35
8.11 USB Interface	35
8.12 Real-Time Clock (RTC)	36
8.13 GPIO	36
8.14 Enhanced Power Management	36
8.15 System Management Features	36
8.15.1 TCO Timer	36
8.15.2 Processor Present Indicator	36
8.15.3 Error Code Correction (ECC) Reporting	36
8.15.4 Function Disable	37
8.16 System Management Bus (SMBus 2.0)	37
8.17 Intel Anti-Theft Technology	37
8.18 Intel Virtualization Technology for Directed I/O	37
8.19 JTAG Boundary-Scan	38
9 BIOS	39
9.1 Overview	39
9.2 ACPI	40
9.3 Power Management Modes	40
9.3.1 Dell Active Power Controller	40
9.3.2 Power Saving BIOS Setting (OS Control)	41
9.3.3 Maximum Performance	41
10 I/O Slots	43
10.1 Overview	43
10.2 PCI Devices	44
10.3 Boot Order	47
10.4 NICs	47
11 Storage	48
11.1 Overview	48
11.2 Drives	48
11.3 RAID Configurations	49
11.4 Optical Disk Drive (ODD)	49
11.5 Tape Drives	50
12 Video and Audio	51
12.1 Video	51
12.2 Audio	51
13 Rack Information	52
13.1 Overview	52
13.2 Rails	52
13.3 Cable Management Arm (CMA)	52
14 Operating Systems	53
15 Virtualization	55
16 Systems Management	56
16.1 Overview	56
16.2 Server Management	56
16.3 Embedded Server Management	57
16.4 Lifecycle Controller and Unified Server Configurator	57
16.5 iDRAC6 Express	58
16.6 iDRAC6 Enterprise	58
17 Peripherals	61
17.1 USB	61
17.2 USB Device	61
17.3 External Storage	62

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Dell

PowerEdge R210 Technical Guide

8.19

JTAG Boundary-Scan

Ibex Peak adds the industry standard JTAG interface and enables Boundary-Scan in

place of the XOR chains used in previous generations of the Ibex Peak. Boundary-Scan

can be used to ensure device connectivity during the board manufacturing process.

The JTAG interface allows system manufacturers to improve efficiency by using

industry available tools to test the Ibex Peak on an assembled board. Since JTAG is a

serial interface, it eliminates the need to create probe points for every pin in an XOR

chain. This eases pin breakout and trace routing and simplifies the interface between

the system and a bed-of-nails tester.