HP Indigo 10000 Electronics Reference Document -- CA493-01140 Rev 00 - Page 42

Output type: polarity, pulse width modulation PWM, constant, Digital outputs

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● Digital inputs - Read input state by software (high/low) - Set active polarity (high/low), input frequency - Enable software interrupt to CPU on input activation - Capture encoder position on input activation - Capture Ethernet PowerLink (EPL) cycle time on input activation ● Digital outputs - Activation: software, encoder position, EPL time, input state - Output type: polarity, pulse width modulation (PWM), constant - For encoder and time activation, the pulse width (time length) can be set ● Encoder - Simulated encoders, physical encoders - connected to field programmable gate array (FPGA) I/Os - Virtual encoders - FPGA internal channels - inside the FPGA they are the same as physical output encoders Figure 4-2 Block diagram 38 Chapter 4 B&R system

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●
Digital inputs
–
Read input state by software (high/low)
–
Set active polarity (high/low), input frequency
–
Enable software interrupt to CPU on input activation
–
Capture encoder position on input activation
–
Capture Ethernet PowerLink (EPL) cycle time on input activation
●
Digital outputs
–
Activation: software, encoder position, EPL time, input state
–
Output type: polarity, pulse width modulation (PWM), constant
–
For encoder and time activation, the pulse width (time length) can be set
●
Encoder
–
Simulated encoders, physical encoders – connected to field programmable gate array (FPGA) I/Os
–
Virtual encoders – FPGA internal channels – inside the FPGA they are the same as physical output
encoders
Figure 4-2
Block diagram
38
Chapter 4
B&R system