Lenovo PC 300PL Technical Information Manual for IBM PC300GL (Type 6563, 6564, - Page 58
Channels 4-7, Write All Mask register bits
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Table 34. DMA I/O address map Address (hex) Description 00CE Channel 7, Transfer Count register 00D0 Channels 4-7, Read Status/Write Command register 00D2 Channels 4-7, Write Request register 00D4 Channels 4-7, Write Single Mask register bit 00D6 Channels 4-7, Mode register (write) 00D8 Channels 4-7, Clear byte pointer (write) 00DA Channels 4-7, Master clear (write)/temp (read) 00DC Channels 4-7, Clear Mask register (write) 00DE Channels 4-7, Write All Mask register bits 00DF Channels 507, 8- or 16-bit mode select Bits 00-15 00-07 00-02 00-02 00-07 N/A 00-07 00-03 00-03 00-07 Byte pointer Yes PCI configuration space map Table 35. PCI configuration space map Bus number (hex) Device number (hex) Function number (hex) Description 00 00 00 VIA VT 82C694X (north bridge) 00 01 00 VIA VT 82C694X (north bridge) 00 02 00 VIA VT 82C596B (south bridge) 00 02 01 VIA VT 82C596B (south bridge) 00 02 02 VIA VT 82C596B (south bridge) 00 02 03 Intel 82371AB power management 00 0 x 12 00 ESS 1930 audio controller 01 00 00 S3Tio3D AGP video 00 0 x 10 N/A Slot 1 00 0 x 0F N/A Slot 2 00 0 x 0E N/A Slot 3 Appendix B. System address maps 51
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