MSI 848P NEO-V User Guide - Page 44

BIOS Setup Advanced Chipset Features MSI Reminds You... Change these settings only if you are familiar with the chipset. DRAM Timing Setting... Press and to enter the sub-menu screen. Configure SDRAM Timing by SPD Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect) EEPROM on the DRAM module. Setting to [Enabled] enables the following fields automatically to be determined by BIOS based on the configurations on the SPD. Selecting [Disabled] allows users to configure these fields manually. CAS# Latency This controls the timing delay (in clock cycles) before SDRAM starts a read command after receiving it. Settings: [2 Clocks], [2.5 Clocks]. [2 Clocks] increases the system performance the most while [2.5 Clocks] provides the most stable performance. 3-11