MSI 990XA User Guide - Page 48

Adjusted DRAM Frequency

Page 48 highlights

BIOS Setup ▶ DRAM Frequency This item is used to adjust the DRAM frequency. Setting to [Auto], the system will detect the DRAM Frequency automatically. ▶ Adjusted DRAM Frequency It shows the adjusted Memory frequency. Read-only. ▶ DRAM Timing Mode This field has the capacity to automatically detect the DRAM timing. ▶ Advanced DRAM Configuration Press to enter the sub-menu. ▶ Command Rate This setting controls the DRAM command rate. ▶ tCL This controls the CAS latency, which determines the timing delay (in clock cycles) before SDRAM starts a read command after receiving it. ▶ tRCD When DRAM is refreshed, both rows and columns are addressed separately. This setup item allows you to determine the timing of the transition from RAS (row address strobe) to CAS (column address strobe). The less the clock cycles, the faster the DRAM performance. ▶ tRP This setting controls the number of cycles for Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refreshing may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. ▶ tRAS This setting determines the time RAS takes to read from and write to memory cell. ▶ tRTP Time interval between a read and a precharge command. 3-12

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3-12
BIOS Setup
DRAM Frequency
Th±s ±tem ±s used to adjust the DRAM frequency. Sett±ng to [Auto], the system w±ll detect
the DRAM Frequency automat±cally.
Adjusted DRAM Frequency
It shows the adjusted Memory frequency. Read-only.
DRAM T±m±ng Mode
Th±s field has the capac±ty to automat±cally detect the DRAM t±m±ng.
Advanced DRAM Configurat±on
Press <Enter> to enter the sub-menu.
Command Rate
Th±s sett±ng controls the DRAM command rate.
tCL
Th±s controls the CAS latency, wh±ch determ±nes the t±m±ng delay (±n clock cycles)
before SDRAM starts a read command after rece±v±ng ±t.
tRCD
When DRAM ±s refreshed, both rows and columns are addressed separately. Th±s
setup ±tem allows you to determ±ne the t±m±ng of the trans±t±on from RAS (row address
strobe) to CAS (column address strobe). The less the clock cycles, the faster the
DRAM performance.
tRP
Th±s sett±ng controls the number of cycles for Row Address Strobe (RAS) to be
allowed to precharge. If ±nsuffic±ent t±me ±s allowed for the RAS to accumulate ±ts
charge before DRAM refresh, refresh±ng may be ±ncomplete and DRAM may fa±l
to reta±n data. Th±s ±tem appl±es only when synchronous DRAM ±s ±nstalled ±n the
system.
tRAS
Th±s sett±ng determ±nes the t±me RAS takes to read from and wr±te to memory cell.
tRTP
T±me ±nterval between a read and a precharge command.