Nintendo NES-001 User Guide - Page 17

as PPU Control Register 1 and PPU Control Register 2 respectively. Both registers should - direct

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Mirrors $0000-$3FFF $10000 $4000 Palettes $3F00 Name Tables Pattern Tables $2000 $0000 Mirrors $0000-$3FFF Mirrors $3F00-$3F1F Sprite Palette Image Palette Mirrors $2000-$2EFF Attribute Table 3 Name Table 3 Attribute Table 2 Name Table 2 Attribute Table 1 Name Table 1 Attribute Table 0 Name Table 0 Pattern Table 1 Pattern Table 0 $10000 $4000 $3F20 $3F10 $3F00 $3000 $2FC0 $2C00 $2BC0 $2800 $27C0 $2400 $23C0 $2000 $1000 $0000 Figure 3-1. PPU memory map. 3.3 PPU Registers Communication between the CPU and other devices takes place via memory mapped I/O registers. The registers used by the PPU are located in main memory at $2000-$2007 with an additional register used for Direct Memory Access at $4014. Remember that locations $2000-$2007 are mirrored every 8 bytes in the region $2008-$3FFF. A summary of all I/O registers can be found in Appendix B. The actions of the PPU can be controlled by the CPU by writing to $2000 and $2001, known as PPU Control Register 1 and PPU Control Register 2 respectively. Both registers should 17

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$0000
$2000
$3F00
$4000
$10000
Pattern Table 0
Pattern Table 1
Mirrors
$3F00-$3F1F
Sprite Palette
Image Palette
Mirrors
$2000-$2EFF
Attribute Table 3
Name Table 3
Attribute Table 2
Name Table 2
Mirrors
$0000-$3FFF
Attribute Table 1
Name Table 1
Attribute Table 0
Name Table 0
$0000
$1000
$2000
$23C0
$2400
$27C0
$2800
$2BC0
$2C00
$2FC0
$3000
$3F00
$3F10
$3F20
$4000
$10000
Name Tables
Palettes
Mirrors
$0000-$3FFF
Pattern Tables
Figure 3-1. PPU memory map.
3.3 PPU Registers
Communication between the CPU and other devices takes place via memory mapped I/O
registers. The registers used by the PPU are located in main memory at $2000-$2007 with
an additional register used for Direct Memory Access at $4014. Remember that locations
$2000-$2007 are mirrored every 8 bytes in the region $2008-$3FFF. A summary of all I/O
registers can be found in Appendix B.
The actions of the PPU can be controlled by the CPU by writing to $2000 and $2001, known
as PPU Control Register 1 and PPU Control Register 2 respectively. Both registers should