Nintendo NES-001 User Guide - Page 35

pAPU Pulse 1 Coarse Tune CT Register.

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$2006 $2007 $4000 $4001 $4002 $4003 $4004 $4005 $4006 $4007 $4008 $4009 $400A $400B $400C $400E $400F $4010 $4011 $4012 $4013 $4014 $4015 $4016 $4017 Write Read / Write Write Write Write Write Write Write Write Write Write Write Write Write Write Write Write Write Write Write Write Write Read / Write Read / Write Read / Write VRAM Address Register 2. VRAM I/O Register: Reads or writes a byte from VRAM at the current address. pAPU Pulse 1 Control Register. pAPU Pulse 1 Ramp Control Register. pAPU Pulse 1 Fine Tune (FT) Register. pAPU Pulse 1 Coarse Tune (CT) Register. pAPU Pulse 2 Control Register. pAPU Pulse 2 Ramp Control Register. pAPU Pulse 2 Fine Tune Register. pAPU Pulse 2 Coarse Tune Register. pAPU Triangle Control Register 1. pAPU Triangle Control Register 2. pAPU Triangle Frequency Register 1. pAPU Triangle Frequency Register 2. pAPU Noise Control Register 1. pAPU Noise Frequency Register 1. pAPU Noise Frequency Register 2. pAPU Delta Modulation Control Register. pAPU Delta Modulation D/A Register. pAPU Delta Modulation Address Register. pAPU Delta Modulation Data Length Register. Sprite DMA Register: Writes cause a DMA transfer to occur from CPU memory at address $100 x n, where n is the value written, to SPR-RAM. pAPU Sound / Vertical Clock Signal Register. Joypad 1: • Bit 0 - Reads data from joypad or causes joypad strobe when writing. • Bit 3 - Indicates whether Zapper is pointing at a sprite. • Bit 4 - Cleared when Zapper trigger is released. Only bit 0 is involved in writing. Joypad 2: When reading: • Bit 0 - Reads data from joypad or causes joypad strobe when writing. • Bit 3 - Indicates whether Zapper is pointing at a sprite. • Bit 4 - Cleared when Zapper trigger is released. Only bit 0 is involved in writing. 35

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35
$2006
Write
VRAM Address Register 2.
$2007
Read / Write
VRAM I/O Register:
Reads or writes a byte from VRAM at the current address.
$4000
Write
pAPU Pulse 1 Control Register.
$4001
Write
pAPU Pulse 1 Ramp Control Register.
$4002
Write
pAPU Pulse 1 Fine Tune (FT) Register.
$4003
Write
pAPU Pulse 1 Coarse Tune (CT) Register.
$4004
Write
pAPU Pulse 2 Control Register.
$4005
Write
pAPU Pulse 2 Ramp Control Register.
$4006
Write
pAPU Pulse 2 Fine Tune Register.
$4007
Write
pAPU Pulse 2 Coarse Tune Register.
$4008
Write
pAPU Triangle Control Register 1.
$4009
Write
pAPU Triangle Control Register 2.
$400A
Write
pAPU Triangle Frequency Register 1.
$400B
Write
pAPU Triangle Frequency Register 2.
$400C
Write
pAPU Noise Control Register 1.
$400E
Write
pAPU Noise Frequency Register 1.
$400F
Write
pAPU Noise Frequency Register 2.
$4010
Write
pAPU Delta Modulation Control Register.
$4011
Write
pAPU Delta Modulation D/A Register.
$4012
Write
pAPU Delta Modulation Address Register.
$4013
Write
pAPU Delta Modulation Data Length Register.
$4014
Write
Sprite DMA Register:
Writes cause a DMA transfer to occur from CPU memory at
address $100 x n, where n is the value written, to SPR-RAM.
$4015
Read / Write
pAPU Sound / Vertical Clock Signal Register.
$4016
Read / Write
Joypad 1:
•
Bit 0 - Reads data from joypad or causes joypad strobe
when writing.
•
Bit 3 - Indicates whether Zapper is pointing at a sprite.
•
Bit 4 - Cleared when Zapper trigger is released.
Only bit 0 is involved in writing.
$4017
Read / Write
Joypad 2:
When reading:
•
Bit 0 - Reads data from joypad or causes joypad strobe
when writing.
•
Bit 3 - Indicates whether Zapper is pointing at a sprite.
•
Bit 4 - Cleared when Zapper trigger is released.
Only bit 0 is involved in writing.