Nintendo NES-001 User Guide - Page 21

Sprites - everything

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• Single-screen mirroring points all four logical name tables to the same physical name table as shown in figure 3-6. 11 11 Figure 3-6. Single-screen mirroring. • Four-screen mirroring uses an additional 2 KB of RAM in the cartridge itself to allow logical name tables to each map to separate physical name tables as shown in figure 3-7. 12 34 Figure 3-7. Four-screen mirroring. 3.7 Sprites Sprites are the characters to draw on the screen. Sprites can be either 8x8 pixels or 8x16 pixels. Most characters are composed of multiple sprites. The sprite data is stored in the pattern tables while the sprite attributes are stored in SPR-RAM. There are a maximum of 64 sprites, each of which uses four bytes in SPR-RAM. The bytes work as follows: • Byte 0 - Stores the y-coordinate of the top left of the sprite minus 1. • Byte 1 - Index number of the sprite in the pattern tables. • Byte 2 - Stores the attributes of the sprite. • Bits 0-1 - Most significant two bits of the colour. • Bit 5 - Indicates whether this sprite has priority over the background. • Bit 6 - Indicates whether to flip the sprite horizontally. • Bit 7 - Indicates whether to flip the sprite vertically. 8x16 sprites use different pattern tables based on their index number. If the index number is even the sprite data is in the first pattern table at $0000, otherwise it is in the second pattern table at $1000. Sprites can be read or written one at a time by first writing the required address to $2003 and then reading or writing $2004. Alternatively the whole of SPR-RAM can be written in one DMA operation by writing to $4014. Sprites are given priority based on their position in SPR-RAM. The first sprite is known as sprite 0 and has higher priority. On each line the system calculates which sprites are on that line and draws them, lowest priority first, to ensure high priority sprites are drawn on top. Only eight sprites are allowed per scanline, and the system indicates when this number has been reached by setting bit 5 of I/O register $2002. 21

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21
•
Single-screen mirroring points all four logical name tables to the same physical name
table as shown in figure 3-6.
1
1
1
1
Figure 3-6. Single-screen mirroring.
•
Four-screen mirroring uses an additional 2 KB of RAM in the cartridge itself to allow
logical name tables to each map to separate physical name tables as shown in figure 3-7.
1
2
3
4
Figure 3-7. Four-screen mirroring.
3.7 Sprites
Sprites are the characters to draw on the screen. Sprites can be either 8x8 pixels or 8x16
pixels. Most characters are composed of multiple sprites. The sprite data is stored in the
pattern tables while the sprite attributes are stored in SPR-RAM. There are a maximum of 64
sprites, each of which uses four bytes in SPR-RAM. The bytes work as follows:
•
Byte 0 - Stores the y-coordinate of the top left of the sprite minus 1.
•
Byte 1 - Index number of the sprite in the pattern tables.
•
Byte 2 - Stores the attributes of the sprite.
•
Bits 0-1 - Most significant two bits of the colour.
•
Bit 5 - Indicates whether this sprite has priority over the background.
•
Bit 6 - Indicates whether to flip the sprite horizontally.
•
Bit 7 - Indicates whether to flip the sprite vertically.
8x16 sprites use different pattern tables based on their index number. If the index number is
even the sprite data is in the first pattern table at $0000, otherwise it is in the second pattern
table at $1000.
Sprites can be read or written one at a time by first writing the required address to $2003 and
then reading or writing $2004. Alternatively the whole of SPR-RAM can be written in one
DMA operation by writing to $4014.
Sprites are given priority based on their position in SPR-RAM. The first sprite is known as
sprite 0 and has higher priority. On each line the system calculates which sprites are on that
line and draws them, lowest priority first, to ensure high priority sprites are drawn on top.
Only eight sprites are allowed per scanline, and the system indicates when this number has
been reached by setting bit 5 of I/O register $2002.