ViewSonic VG150B Service Manual - Page 31

Vpre/Cvpre

Page 31 highlights

Service Manual VG150 THEORY OF CIRCUIT OPERATION ViewSonic April 1999 - Version 1.0 HN Frequency Counter MT1/112E can discriminate HSYNCNSYNC frequency and saves the information in XFRs. The 15 bits Hcounter counts the time of 64XHSYNC period, but only 11 upper bits are loaded into the HCNTH/HCNTL latch. The 11 bits output value will be (2/Hfreq) / (1/OSCfreq), updated once per VSYNC/CVSYNC period when VSYNC/CVSYNC is present or continuously updated when VSYNC/CVSYNC is non-present. The 14 bits Vcounter counts the time between two VSYNC pules, but only 9 upper bits are laoded into the VCNTHNCNTL latch. The 9 bits output value will be (1Nfreq) / (512/OSCfreq), updated every VSYNC/CVSYNC period. An extra overflow it indicates the condition of HN counter overflow. The VFchg/HFchg interrupt is active when VCNT/HCNT value changes or overflow. HN Present Check The Hpresent function checks the input HSYNC pules, Hpre flag is set when HSYNC IS OVER 10KHz or cleared when HSYNC is under 10Hz. The Vpresent function checks the input VSYNC pules, the Vpre flag is set when VSYNC is over 40Hz or cleared when VSYNC is under 10Hz. Acontrol bit "PREFS" selects the time base for these functions. The HPRchg interrupt is set when the Hpre value changes. The VPRchg interrupt is set when the Vpre/Cvpre value change. However, the Cvpre flag interrupt may be disabled when S/W disable the composite function. Output HBLANKNBLANK Control and Polarity Adjust The HBLANK is the mux output of HSYNC and self-test horizontal pattern. The VBLank is thw mux output of VSYNC, CVSYNC and self-test vertical pattern. The mux selection and output polarity are S/W controllable. The VBLANK output is cut off when VSYNC ferquency is over 200Hz or 133Hz depends on 8MHz/12MHz OSC selection. The HBLANKNBLANK shares the output pin with P4.1/P4.0. Page 28

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Service
Manual
VG150
ViewSonic
April
1999
-
Version
1.0
THEORY
OF
CIRCUIT
OPERATION
HN
Frequency
Counter
MT1/112E
can
discriminate
HSYNCNSYNC
frequency
and
saves
the
information
in
XFRs.
The
15
bits
Hcounter
counts
the
time
of
64XHSYNC
period,
but
only
11
upper
bits
are
loaded
into
the
HCNTH/HCNTL
latch.
The
11
bits
output
value
will
be
(2/Hfreq)
/
(1/OSCfreq),
updated
once
per
VSYNC/CVSYNC
period
when
VSYNC/CVSYNC
is
present
or
continuously
updated
when
VSYNC/CVSYNC
is
non
-present.
The
14
bits
Vcounter
counts
the
time
between
two
VSYNC
pules,
but
only
9
upper
bits
are
laoded
into
the
VCNTHNCNTL
latch.
The
9
bits
output
value
will
be
(1Nfreq)
/
(512/OSCfreq),
updated
every
VSYNC/CVSYNC
period.
An
extra
overflow
it
indicates
the
condition
of
HN
counter
overflow.
The
VFchg/HFchg
interrupt
is
active
when
VCNT/HCNT
value
changes
or
overflow.
HN
Present
Check
The
Hpresent
function
checks
the
input
HSYNC
pules,
Hpre
flag
is
set
when
HSYNC
IS
OVER
10KHz
or
cleared
when
HSYNC
is
under
10Hz.
The
Vpresent
function checks
the
input
VSYNC
pules,
the
Vpre
fl
ag
is
set
when
VSYNC
is
over
40Hz
or
cleared
when
VSYNC
is
under
10Hz.
Acontrol
bit
"PREFS"
selects
the
time
base
for
these
functions.
The
HPRchg
interrupt
is
set
when
the
Hpre
value
changes.
The
VPRchg
interrupt
is
set
when
the
Vpre/Cvpre
value
change.
However,
the
Cvpre
flag
interrupt
may
be
disabled
when
S/W
disable
the
composite
function.
Output
HBLANKNBLANK
Control
and
Polarity
Adjust
The
HBLANK
is
the
mux
output
of
HSYNC
and
self
-test
horizontal
pattern.
The
VBLank
is
thw
mux
output
of
VSYNC,
CVSYNC
and
self
-test
vertical
pattern.
The
mux
selection
and
output
polarity
are
S/W
controllable.
The
VBLANK
output
is
cut
off
when
VSYNC
ferquency
is
over
200Hz
or
133Hz
depends
on
8MHz/12MHz
OSC
selection.
The
HBLANKNBLANK
shares
the
output
pin
with
P4.1/P4.0.
Page
28