Asus A8N-SLI A8N-SLI English edition user's manual, version E2068 - Page 56
Chipset configuration - 32
UPC - 610839124862
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2.4.2 Chipset configuration The items in this menu show the chipset configuration settings. Select an item then press to display a pop-up menu with the configuration options. Chipset DRAM Configuration Errata 94 Enhanced [Press Enter] [Enabled] Select Menu Item Specific Help DRAM timing and control. DRAM Configuration The items in this sub-menu show the DRAM-related information that the BIOS auto-detects. DRAM Configuration Timing Mode [Auto] x Memclock index value (Mhz) x CAS# Latency (Tcl) 2.5 x Min RAS# active time (Tras) x RAS# to CAS# delay (Trcd) x Row precharge time (Trp) 2T x 1/T/2T Memory Timing 2T Bottom of 32-bit [31:24] IO DRAM Over 4G Remapping [Disabled] MTRR mapping mode [Continuous] 200Mhz 8T 4T [E0] Select Menu Item Specific Help to select DRAM configuration. [Auto] is recommended. [Manual] allows you to set each configuration on your own. 2-18 Chapter 2: BIOS setup