Asus PRIME Z590-P WIFI Intel 500 series Channel BIOS UM English - Page 20

Third Timings, Early DQ Write Strength and Equalization Training

Page 20 highlights

Margin Check Limit Configuration options: [Disabled] [L1] [L2] [Both] The following item is accessible only when you set Margin Check Limit to [L2] or [Both]. Margin Limit Check L2 Configuration options: [1] - [300] Memory Test Configuration options: [Disabled] [Enabled] DIMM SPD Alias Test Configuration options: [Auto] [Disabled] [Enabled] Receive Enable Centering 1D Configuration options: [Auto] [Disabled] [Enabled] Retrain Margin Check Configuration options: [Disabled] [Enabled] Write Drive Strength Up/Dn independently Configuration options: [Disabled] [Enabled] CMD Slew Rate Training Configuration options: [Auto] [Disabled] [Enabled] CMD Drive Strength and Tx Equalization Configuration options: [Auto] [Disabled] [Enabled] Command Normalization Configuration options: [Disabled] [Enabled] Early DQ Write Strength and Equalization Training Configuration options: [Disabled] [Enabled] Read Voltage Centering 1D Configuration options: [Disabled] [Enabled] Dimm ODT CA Training Configuration options: [Disabled] [Enabled] DQ DFE Training Configuration options: [Disabled] [Enabled] Third Timings tRDRD_sg_Training / tRDRD_sg_Runtime / tRDRD_dg_Training / tRDRD_dg_Runtime / tRDWR_sg / tRDWR_dg / tWRWR_sg / tWRWR_dg Configuration options: [Auto] [0] - [63] tWRRD_sg Configuration options: [Auto] [0] - [127] tWRRD_dg Configuration options: [Auto] [0] - [63] 20 PRIME / TUF GAMING Intel® 500 Series BIOS Manual

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64

20
PRIME / TUF GAMING Intel
®
500 Series BIOS Manual
Margin Check Limit
Configuration options: [Disabled] [L1] [L2] [Both]
The following item is accessible only when you set
Margin Check Limit
to
[L2]
or
[Both]
.
Margin Limit Check L2
Configuration options: [1] – [300]
Memory Test
Configuration options: [Disabled] [Enabled]
DIMM SPD Alias Test
Configuration options: [Auto] [Disabled] [Enabled]
Receive Enable Centering 1D
Configuration options: [Auto] [Disabled] [Enabled]
Retrain Margin Check
Configuration options: [Disabled] [Enabled]
Write Drive Strength Up/Dn independently
Configuration options: [Disabled] [Enabled]
CMD Slew Rate Training
Configuration options: [Auto] [Disabled] [Enabled]
CMD Drive Strength and Tx Equalization
Configuration options: [Auto] [Disabled] [Enabled]
Command Normalization
Configuration options: [Disabled] [Enabled]
Early DQ Write Strength and Equalization Training
Configuration options: [Disabled] [Enabled]
Read Voltage Centering 1D
Configuration options: [Disabled] [Enabled]
Dimm ODT CA Training
Configuration options: [Disabled] [Enabled]
DQ DFE Training
Configuration options: [Disabled] [Enabled]
Third Timings
tRDRD_sg_Training / tRDRD_sg_Runtime / tRDRD_dg_Training /
tRDRD_dg_Runtime / tRDWR_sg / tRDWR_dg / tWRWR_sg / tWRWR_dg
Configuration options: [Auto] [0] – [63]
tWRRD_sg
Configuration options: [Auto] [0] – [127]
tWRRD_dg
Configuration options: [Auto] [0] – [63]