Asus PRIME Z590-P WIFI Intel 500 series Channel BIOS UM English - Page 21

tRDRD_dr / tRDRD_dd / tRDWR_dr / tRDWR_dd / tWRWR_dr / tWRWR_dd / tWRRD_dr / tWRRD_dd Configuration options: [Auto] [0] - [63] TWRPRE Configuration options: [Auto] [0] - [127] TRDPRE Configuration options: [Auto] [0] - [15] tREFIX9 Configuration options: [Auto] [0] - [127] OREF_RI Configuration options: [Auto] [0] - [255] TXP Configuration options: [Auto] [0] - [15] PPD Configuration options: [Auto] [0] [1] Misc. MRC Fast Boot Allows you to enable or disable fast path through the MRC. Configuration options: [Auto] [Disabled] [Enabled] Delay after Train Allows you to enable or disable DRAM to delay 10 seconds after training to reach a certain temperature during extreme overclocking. Configuration options: [Disabled] [Enabled] DRAM CLK Period Allows you to select the DRAM clock period. Configuration options: [Auto] [1] - [58] Memory Scrambler Allows you to enable or disable Memory Scrambler support. Configuration options: [Disabled] [Enabled] Channel A DIMM Control / Channel B DIMM Control Allow you to enable or disable DIMMs on Channel A(/B). Configuration options: [Enable both DIMMs] [Disable DIMM0] [Disable DIMM1] [Disable both DIMMs] MCH Full Check Allows you to enable MCH Full Check to enhance the system stability, or disable it to enhance DRAM overclocking capability. Configuration options: [Auto] [Disabled] [Enabled] Mem Over Clock Fail Count Configuration options: [Auto] [1] - [255] Training Profile Allows you to select DIMM Training Profile. Configuration options: [Auto] [Standard Profile] [ASUS User Profile] PRIME / TUF GAMING Intel® 500 Series BIOS Manual 21