HP ProLiant BL660c AMD Opteron™ and Intel® Xeon® x - Page 8

Table 3. 32-bit x86 instructions common to AMD Opteron and Intel Xeon processors Instruction name Standard x86 MMX x87 SSE, SSE2, SSE3, and SSE4a Description Instructions for logical operations, arithmetic operations, and address calculations. Also has 16bit index registers for memory pointers. Multimedia instructions that allow the processor to do 64-bit SIMD operations Instructions for floating point calculations SSE improves upon the MMX instructions and allows processors to do 128-bit SIMD floating-point operations. SSE2 adds 64-bit parallel floating-point numeric support. It also adds new instructions to support 128-bit SIMD integer operations. SSE3 instructions include 13 instructions that accelerate performance of SSE technology, SSE2 technology and x87-floating-point math capabilities. SSE4a instructions include two new SSE instructions. SSE4a instructions also add support for unaligned SSE load-operation, which formerly required 16byte alignment. Register type GPR MMX FP MMX Size of registers 32-bit 64-bit 80-bit 128-bit Number of registers 8 8 8 8 64-bit extensions AMD's and Intel's 64-bit extensions-named AMD64 and Intel 64-allow 32-bit processors to run 64bit operating systems and applications. The key advantage of 64-bit processing is that a system can address a flat memory space of up to 16 exabytes. While 32-bit architecture theoretically can allow access up to 64 GB of memory, most 32-bit applications use only a maximum of 4 GB. That is due to the cumbersome and slow nature of the process needed to access the remainder of the memory. The 64-bit extensions give you the benefit of 64-bit addressing at a lower cost than the new hardware and software required for a 64-bit processor. The 64-bit extensions also provide a larger register set with eight additional general-purpose registers (GPR) and 64-bit versions of the existing registers. With 16 GPRs, 64-bit extensions supply additional resources that compilers can use to increase performance. I/O architecture The I/O architecture of AMD Opteron-based and Xeon-based systems includes high-speed, point-topoint interconnects. The devices-AMD HyperTransport 3.0 (HT3) and Intel QuickPath Interconnect- move data to processors, memory, and I/O devices. They improve performance, simplify design, and facilitate scalable multiprocessing systems. 8