HP Vectra XA 5/xxx HP Vectra xA 5/XXX Series 5 /vl 5/xxx series 5 pc Technical - Page 82

4 Summary of the HP/Phoenix BIOS BIOS Addresses DMA Channel Controllers Only "I/O-to-memory" and "memory-to-I/O" transfers are allowed. "I/O-to-I/O" and "memory-to-memory" transfers are disallowed by the hardware configuration. The system controller supports seven DMA channels, each with a page register used to extend the addressing range of the channel to 16 MB. The following table summarizes how the DMA channels are allocated. Channel 0 1 2 3 Channel 4 5 6 7 First DMA controller (used for 8-bit transfers) Function Available SoundBlaster or ECP mode for parallel port Flexible disk I/O ECP mode for parallel port or SoundBlaster Second DMA controller (used for 16-bit transfers) Function Cascade from first DMA controller SoundBlaster or Available Available Available or SoundBlaster Interrupt Controllers The system has two 8259A compatible interrupt controllers. They are arranged as a master interrupt controller and a slave that is cascaded through the master. The following table shows how the master and slave controllers are connected. The Interrupt Requests (IRQ) are numbered sequentially, starting with the master controller, and followed by the slave. 82