Icom IC-R20 Service Manual - Page 18

Other circuits, 3-2 BAR ANTENNA TUNING CIRCUIT RF UNIT - charger

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Page 18 highlights

4-2-7 BFO CIRCUIT (LOGIC UNIT) The oscillated signal at the BFO VCO circuit (IC6, X2) is applied to the MAIN unit via the J5 (pin 35) as the BFO, and is then amplified at the BFO amplifier (RF unit; Q530). The amplified signal is mixed with 3rd IF signal to demodulate to AF signal on SSB/CW modes. The carrier frequency is shifted by "BFO_SHIFT" signal from the main CPU (IC3, pin 2) while receiving SSB modes. 4-3 OTHER CIRCUITS 4-3-1 BATTERY CHARGER CIRCUIT (LOGIC UNIT) When charging the installed battery (BP-206), the battery charger control signal (CHGC) becomes high, and is then output from the CPU (IC3, pin 39). The signal is applied to the battery charger controller (Q34), and its output controls the battery charger circuit (Q31, D28, D29) to output 400 mA (typical) charging current. 4-3-2 BAR ANTENNA TUNING CIRCUIT (RF UNIT) When selecting the internal bar antenna while AM band signals are receiving, the interal bar antenna switching signal is output from the D/A converter (IC22, pin 7) as "ANTSW" signal. The signal is applied to the antenna switching circuit (Q510, D76), and then switches to the internal bar antenna. The expander IC (IC14) outputs the "A-TRAC" bar antenna control signal from pin 8. The signal is applied to the level converter (Q513), and is then applied to the AM bar antenna tune circuit (D100). The circuit tunes to the desire frequency to change the D100's capacity. 4-3-3 EARPHONE ANTENNA CIRCUIT (LOGIC AND RF UNITS) When selecting the earphone antenna while WFM band receiving, the received RF signal passes through the external speaker jack (LOGIC unit; J3). The signal is applied to the RF unit via the J5, pin 4 as "EAR" signal. The signal is applied to the antenna switch (RF unit; D101), and is then applied to the 30-300 MHz RF circuit. 4-3-4 RESET CIRCUIT (LOGIC UNIT) When [POWER] switch is ON, CPU3 signal from the +3 regulator (IC8) is applied to the reset IC (IC2, pin 2). The IC outputs reset signal via the "RESET" line, and the signal is applied to the main CPU (IC3, pin 10) to reset it. 4-3-5 LCD BACKLIGHT CIRCUIT (LOGIC UNIT) When the LCD backlight is ON, the LCD backlight control signal becomes high, and is output from the main CPU (IC3, pin 41) as "LIGHT" signal. The signal is applied to the backlight control switch (Q2, Q4 and Q5), and is then applied to the LCD backlight LEDs (DS1-DS9 and EP12). 4 - 10

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4 - 10
4-2-7 BFO CIRCUIT (LOGIC UNIT)
The oscillated signal at the BFO VCO circuit (IC6, X2) is
applied to the MAIN unit via the J5 (pin 35) as the BFO, and
is then amplified at the BFO amplifier (RF unit; Q530). The
amplified signal is mixed with 3rd IF signal to demodulate to
AF signal on SSB/CW modes.
The carrier frequency is shifted by
“
BFO_SHIFT
”
signal from
the main CPU (IC3, pin 2) while receiving SSB modes.
4-3 OTHER CIRCUITS
4-3-1 BATTERY CHARGER CIRCUIT (LOGIC UNIT)
When charging the installed battery (BP-206), the battery
charger control signal (CHGC) becomes high, and is then
output from the CPU (IC3, pin 39). The signal is applied to
the battery charger controller (Q34), and its output controls
the battery charger circuit (Q31, D28, D29) to output 400 mA
(typical) charging current.
4-3-2 BAR ANTENNA TUNING CIRCUIT (RF UNIT)
When selecting the internal bar antenna while AM band
sig-
nals are receiving, the interal bar antenna switching signal is
output from the D/A converter (IC22, pin 7) as
“
ANTSW
”
sig-
nal. The signal is applied to the antenna switching circuit
(Q510, D76), and then switches to the internal bar antenna.
The expander IC (IC14) outputs the
“
A-TRAC
”
bar antenna
control signal from pin 8. The signal is applied to the level
converter (Q513), and is then applied to the AM bar anten-
na tune circuit (D100). The circuit tunes to the desire fre-
quency to change the D100
’
s capacity.
4-3-3 EARPHONE ANTENNA CIRCUIT
(LOGIC AND RF UNITS)
When selecting the earphone antenna while WFM band
receiving, the received RF signal passes through the exter-
nal speaker jack (LOGIC unit; J3). The signal is applied to
the RF unit via the J5, pin 4 as
“
EAR
”
signal. The signal is
applied to the antenna switch (RF unit; D101), and is then
applied to the 30
–
300 MHz RF circuit.
4-3-4 RESET CIRCUIT (LOGIC UNIT)
When [POWER] switch is ON, CPU3 signal from the +3 reg-
ulator (IC8) is applied to the reset IC (IC2, pin 2). The IC out-
puts reset signal via the
“
RESET
”
line, and the signal is
applied to the main CPU (IC3, pin 10) to reset it.
4-3-5 LCD BACKLIGHT CIRCUIT (LOGIC UNIT)
When the LCD backlight is ON, the LCD backlight control
signal becomes high, and is output from the main CPU (IC3,
pin 41) as
“
LIGHT
”
signal. The signal is applied to the back-
light control switch (Q2, Q4 and Q5), and is then applied to
the LCD backlight LEDs (DS1
–
DS9 and EP12).