MSI 945GM3-F User Guide - Page 54

PNP/PCI Configurations

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PNP/PCI Configurations BIOS Setup PCI Latency Timer This item controls how long each PCI device can hold the bus before another takes over. W hen set to higher values, every PCI device can conduct transactions for a longer time and thus improve the effective PCI bandwidth. For better PCI performance, you should set the item to higher values. PCI Slot-1/2/3 IRQ Preference These items specify the IRQ line for each PCI slot. Selecting [Auto] allows BIOS to automatically determine the IRQ line for each PCI slot. IRQ Resource Setup Press to enter the sub-menu. IRQ 3/4/5/7/9/10/11/14/15 These items specify the bus where the specified IRQ line is used. The settings determine if AMIBIOS should remove an IRQ from the pool of available IRQs passed to devices that are configurable by the system BIOS. The available IRQ pool is determined by reading the ESCD NVRAM. If more IRQs must be removed from the IRQ pool, the end user can use these settings to reserve the IRQ by assigning an [Reserved] setting to it. Onboard I/O is configured by AMIBIOS. All IRQs used by onboard I/O are configured as [Available]. If all IRQs are set to [Reserved], and IRQ 14/15 are allocated to the onboard PCI IDE, IRQ 9 will still be available for PCI and PnP devices. 3-17

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3-17
BIOS Setup
PNP/PCI Configurations
PCI Latency Timer
This item controls how long each PCI device can hold the bus before another takes
over. When set to higher values, every PCI device can conduct transactions for a
longer time and thus improve the effective PCI bandwidth. For better PCI performance,
you should set the item to higher values.
PCI Slot-1/2/3 IRQ Preference
These items specify the IRQ line for each PCI slot. Selecting [Auto] allows BIOS to
automatically determine the IRQ line for each PCI slot.
IRQ Resource Setup
Press <Enter> to enter the sub-menu.
IRQ 3/4/5/7/9/10/11/14/15
These items specify the bus where the specified IRQ line is used.
The settings determine if AMIBIOS should remove an IRQ from the pool of avail-
able IRQs passed to devices that are configurable by the system BIOS. The
available IRQ pool is determined by reading the ESCD NVRAM. If more IRQs must
be removed from the IRQ pool, the end user can use these settings to reserve
the IRQ by assigning an [Reserved] setting to it. Onboard I/O is configured by
AMIBIOS. All IRQs used by onboard I/O are configured as [Available]. If all IRQs
are set to [Reserved], and IRQ 14/15 are allocated to the onboard PCI IDE, IRQ 9
will still be available for PCI and PnP devices.