Pioneer SX-255R Service Manual - Page 20

PDG172A, IC826

Page 20 highlights

SX-255R, SX-205 8. IC INFORMATION • The information shown in the list is basic information and may not correspond exactly to that shown in the schematic diagrams. • PDG172A (IC826: FL AND UCOM ASSY) • Receiver Control Micro-computer • Block Diagram ANO to ANT I 8 TO to TT , 0 TVS 28 y• 8 115/S 2t SO to 520 t 2I VF DP I cS0 SIO SOO Tea Sit rel ig ECOt: To LrINnT AID CONVERTER FOP CONTROLLER/ DRIVER RAM 80 BYTES R CMOCON Ft FO SERIAL INTERFACE UNIT 0 I FIFO SERIAL INTERFACE UNIT OBIT TIMER/COUNTER 0 8 INT TIMER 1 16611 CAPTURE TIMER / CCONTER 2 INTERRUPT CONTROLLER rr-T tato180104T2 :NTS EXTAt. XFAL. RST Imo tat SPITED CPU CORE ROM 16X BYTES PRESCALER / TIME SASE TIMER CLOCK GEN./ a PAO to PA7 SYSTEM CONTROL RAM 624 BYTES c> 0 r7ta - PEIO to POD 1 , Par • B PCO to PC7 o I POO to PD7 --to i PEO to PA PER to PE7 8 PPP to PF7 - C> g (.. 1P°3 to PO3 e Pin Assignment (Top view) k,"-; cf, s FES/11473 PE4/RA1C PE5 PER PET/TO P00/LINT ',C5° P82/SCK0 P63/510 P84/500 PBS/56kt P86/5I1 PB7/501 PCO/KRO PCI/ KR1 PC2/KR 2 PC3/ KR 3 PC4/KR4 PCS/KR5 PC6/806 PCT/KR7 P/10/4140 PP I/PN I PA 2/4112 as 79 TB O 2 3 4 5 6 7 8 9 10 12 IS 14 IS 16 IT IB 19 20 21 23 24 25 26 76 75 72 TI 9 68 66 PDG172A 30 31 33 36 7 313 9 ,•, ' 64 T6 63 TT 62 18/520 6I T9/527 60 7107326 59 711/525 P0712/524 7137523 7147522 55 7157521 54 520 1.3 5:9 sus 51 SIT 516 PF IS 48 • PF6/S14 P13/513 46 • P14/512 45 • PF3/SI I 44 • P12/510 43 PFI/59 4 PF0/58 P07/3T • Pin Function No. Pin Name I/O Description 1 PE3/INT3 I External interrupt request input terminal 2 PE4/RMC I Remote control reception circuit input terminal 3 PE5 I 4 PE6 O 5 PE7/TO O 16 bit timer/counter rectangular wave output terminal 6 PB0/CINT I/O External capture input terminal to the 16bit timer/counter 7 PB1/CSO I/O Serial interface (CH 0) chip select input terminal 8 PB2/SCK0 I/O Serial clock (CH 0) I/O terminal 9 PB3/SI0 I Serial data (CH 0) input terminal 10 PB4/SO0 O Serial data (CH 0) output terminal 11 PB5/SCK1 1/O Serial clock (CH 1)1/O terminal 12 PB6/SI1 I Serial data (CH 1) input terminal 13 PB7/SO1 O Serial data (CH 1) output terminal 28

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SX-255R,
SX-205
8.
IC
INFORMATION
The
information
shown
in
the
list
is
basic
information
and
may
not
correspond
exactly
to
that
shown
in
the
schematic
diagrams.
PDG172A
(IC826:
FL
AND
UCOM
ASSY)
Receiver
Control
Micro
-computer
Block
Diagram
ANO
to
ANT
I
8
AID
CONVERTER
TO
to
TT
,
0
TVS
28
y•
8
115/S
2t
SO
to
520
t
2I
VF
DP
I
cS0
SIO
SOO
Tea
Sit
re
l
ig
ECOt:
To
LINT
rn
FOP
CONTROLLER/
DRIVER
RAM
80
BYTES
R
CM
OCON
Ft
FO
SERIAL
INTERFACE
I
FIFO
UNIT
0
SERIAL
INTERFACE
UNIT
OBIT
TIMER/COUNTER
0
8
INT
TIMER
1
16611
CAPTURE
TIMER
/
CCONTER
2
e
Pin
Assignment
(Top
view)
k,"-;
cf,
s
tato
180104T2
:NTS
rr
-
T
INTERRUPT
CONTROLLER
SPITED
CPU
CORE
ROM
16X
BYTES
EXTAt.
XFAL.
RST
Imo
tat
CLOCK
GEN./
SYSTEM
CONTROL
RAM
624
BYTES
c>
FES/11473
as
79
TB
76
75
72
TI
9
68
66
T6
O
64
PE4/RA1C
2
63
TT
PE5
3
62
18/520
PER
4
6I
T9/527
PET/TO
5
60
7107326
P00/LINT
6
59
711/525
',C5°
7
P0712/524
8
7137523
P82/SCK0
P63/510
9
7147522
P84/500
10
7157521
PBS/56kt
54
520
PDG172A
P86/5I1
12
1.
3
5:9
PB7/501
IS
sus
PCO/KRO
14
51
SIT
PC
I/
KR1
IS
516
PF
IS
PC2/KR
2
16
PC3/
KR
3
PC4/KR4
IT
IB
48
PF6/S14
P13/513
PCS/KR5
19
46
P14/512
PC6/806
20
45
PF3/SI
I
PCT/KR7
21
44
P12/510
P/10/4140
43
PFI/59
PP
I/PN
I
23
4
PF0/58
PA
2/4112
24
P07/3T
55
25 26
28
30
31
33
,•,
'
36
7
313
9
PRESCALER
/
TIME
SASE
TIMER
a
PAO
to
PA7
r7a
t
PEIO
to
POD
1
,
Par
B
PCO
to
PC7
o
I
0
POO
to
PD7
--
to
i
PEO
to
PA
PER
to
PE7
8
PPP
to
PF7
-
C>
g
(..
1
P°3
to PO3
Pin
Function
No.
Pin
Name
I/O
Description
1
PE3/INT3
I
External
interrupt
request
input
terminal
2
PE4/RMC
I
Remote
control
reception
circuit
input
terminal
3
PE5
I
4
PE6
O
5
PE7/TO
O
16
bit
timer/counter
rectangular
wave
output
terminal
6
PB0/CINT
I/O
External
capture
input
terminal
to
the
16
-
bit
timer/counter
7
PB1/CSO
I/O
Serial
interface
(CH
0)
chip
select
input
terminal
8
I/O
Serial
clock
(CH
0)
I/O
terminal
PB2/SCK0
9
PB3/SI0
I
Serial
data
(CH
0)
input
terminal
10
PB4/SO0
O
Serial
data
(CH
0)
output
terminal
11
1/O
Serial
clock
(CH
1)1/O
terminal
PB5/SCK1
12
PB6/SI1
I
Serial
data
(CH
1)
input
terminal
13
PB7/SO1
O
Serial
data
(CH
1)
output
terminal