ViewSonic E70FSB-2 Service Manual - Page 97

IC401 Block diagram and application circuit.

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94 Confidential - Do Not Copy E70f-5_E70fB-5_E70fSB-5 o k, full pagewidth IC401 Block diagram and application circuit. VSYNC 14 (TTL level) VERTICAL SYNC INPUT AND POLARITY CORRECTION clamping blanking CLBL 16 VIDEO CLAMPING AND VERTICAL BLANK HUNLOCK 17 HUNLOCK OUTPUT SDA SCL 19 I2C-BUS 18 RECEIVER 9.2 to 13.2 V VCC 10 PGND 7 SGND 25 SUPPLY AND REFERENCE 22 kΩ (1%) VREF 23 100 nF (5%) EHT compensation via vertical size EHT compensation 150 via horizontal size nF VCAP VAGC 24 22 VSMOD 21 HSMOD 31 EWDRV 11 7 V 1.2 V VERTICAL SYNC INTEGRATOR VERTICAL OSCILLATOR AND AGC EHT COMPENSATION HORIZONTAL SIZE AND VERTICAL SIZE EW-OUTPUT HORIZONTAL PINCUSHION HORIZONTAL CORNER HORIZONTAL TRAPEZIUM HORIZONTAL SIZE VERTICAL OUTPUT 12 VERTICAL LINEARITY VERTICAL LINEARITY 13 BALANCE VOUT2 VOUT1 VERTICAL POSITION VERTICAL SIZE, VOVSCN PROTECTION AND SOFT START I2C-BUS REGISTERS COINCIDENCE DETECTOR FREQUENCY DETECTOR TDA4841PS X-RAY PROTECTION OUTPUT 20 ASCOR or ASYMMETRIC EW-CORRECTION FOCUS HORIZONTAL AND VERTICAL B+ CONTROL 32 FOCUS 6 BDRV 4 BSENS 3 BOP 5 BIN X-RAY B+ CONTROL(2) APPLICATION HSYNC 15 (TTL level) H/C SYNC INPUT AND POLARITY CORRECTION (video) PLL1 AND HORIZONTAL POSITION HORIZONTAL OSCILLATOR 3.3 kΩ 100 nF 26 27 HPLL1 HBUF 28 HREF 8.2 RHBUF (1) nF RHREF (1%) 29 HCAP 10 nF (2%) PLL2, PARALLELOGRAM, PIN UNBALANCE AND SOFT START 30 HPLL2 12 nF 1 HFLB 9 2 XSEL XRAY HORIZONTAL OUTPUT STAGE 8 HDRV MHB603 ViewSonic Corporation

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o
k, full pagewidth
VERTICAL
SYNC INPUT
AND POLARITY
CORRECTION
VERTICAL
SYNC
INTEGRATOR
VERTICAL
OSCILLATOR
AND AGC
EW-OUTPUT
HORIZONTAL PINCUSHION
HORIZONTAL CORNER
HORIZONTAL TRAPEZIUM
HORIZONTAL SIZE
VERTICAL LINEARITY
VERTICAL LINEARITY
BALANCE
HORIZONTAL SIZE
AND
VERTICAL SIZE
EHT COMPENSATION
OUTPUT
ASYMMETRIC
EW-CORRECTION
I
2
C-BUS
RECEIVER
HUNLOCK
OUTPUT
VERTICAL POSITION
VERTICAL SIZE, VOVSCN
VIDEO CLAMPING
AND
VERTICAL BLANK
SUPPLY
AND
REFERENCE
HORIZONTAL
OSCILLATOR
PLL1
AND
HORIZONTAL
POSITION
PLL2, PARALLELOGRAM,
PIN UNBALANCE AND
SOFT START
COINCIDENCE DETECTOR
FREQUENCY DETECTOR
I
2
C-BUS REGISTERS
PROTECTION
AND SOFT START
X-RAY
PROTECTION
HORIZONTAL
OUTPUT
STAGE
B
+
CONTROL
22
k
Ω
3.3 k
Ω
100 nF
8.2
nF
150
nF
(1%)
X-RAY
10 nF
R
HBUF
(2%)
R
HREF
(1%)
(1)
B
+
CONTROL
APPLICATION
(2)
(TTL level)
(TTL level)
9.2 to 13.2 V
(video)
clamping
blanking
14
23
22
21
31
11
100
nF
(5%)
24
VOUT2
12
VOUT1
ASCOR
13
BDRV
BSENS
BOP
BIN
8
HDRV
or
20
17
19
18
6
4
3
5
10
7
25
16
15
26
27
28
29
12 nF
30
1
TDA4841PS
H/C SYNC INPUT
AND POLARITY
CORRECTION
MHB603
2
9
VERTICAL OUTPUT
SDA
SCL
HSYNC
SGND
PGND
CLBL
VSYNC
V
CC
EWDRV
VSMOD
VAGC
VCAP
VREF
HSMOD
7 V
1.2 V
EHT compensation
via horizontal size
EHT compensation
via vertical size
HFLB
HPLL2
HCAP
HREF
HBUF
HPLL1
XRAY
XSEL
HUNLOCK
HORIZONTAL
AND VERTICAL
32
FOCUS
FOCUS
IC401 Block diagram and application circuit.
ViewSonic Corporation
Confidential – Do Not Copy
E70f-5_E70fB-5_E70fSB-5
94