AMD AXDA3200DKV4E Data Sheet - Page 47
SYSCLK and SYSCLK# DC Characteristics, SYSCLK and SYSCLK# Differential Clock Signals
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26237C-May 2003 Preliminary Information AMD Athlon™ XP Processor Model 10 Data Sheet 8.9 SYSCLK and SYSCLK# DC Characteristics Table 15 shows the DC characteristics of the SYSCLK and SYSCLK# differential clocks. The SYSCLK signal represents CLKIN and RSTCLK tied together while the SYSCLK# signal represents CLKIN# and RSTCLK# tied together. For more information about SYSCLK and SYSCLK#, see "SYSCLK and SYSCLK#" on page 77 and Table 23, "Pin Name Abbreviations," on page 56. Table 15. SYSCLK and SYSCLK# DC Characteristics Symbol Description Min Max Units VThreshold-DC Crossing before transition is detected (DC) 400 mV VThreshold-AC Crossing before transition is detected (AC) 450 mV ILEAK_P Leakage current through P-channel pullup to VCC_CORE -1 mA ILEAK_N VCROSS Leakage current through N-channel pulldown to VSS (Ground) Differential signal crossover 1 mA VCC_CORE / 2±100 mV CPIN Capacitance * 4 25 * pF Note: * The following processor inputs have twice the listed capacitance because they connect to two input pads-SYSCLK and SYSCLK#. SYSCLK connects to CLKIN/RSTCLK. SYSCLK# connects to CLKIN#/RSTCLK#. Figure 11 shows the DC characteristics of the SYSCLK and SYSCLK# signals. Chapter 8 VCROSS VThreshold-DC = 400mV VThreshold-AC = 450mV Figure 11. SYSCLK and SYSCLK# Differential Clock Signals Electrical Data 35