ASRock H510TM-ITX User Manual - Page 46

Rx FiF0 Delay Offset

Page 46 highlights

tWRRD_dr Configure between module write to read delay. tWRRD_dd Configure between module write to read delay. tWRWR_sg Configure between module write to write delay. tWRWR_dg Configure between module write to write delay. tWRWR_dr Configure between module write to write delay. tWRWR_dd Configure between module write to write delay. Round Trip Timing Round Trip Timing Optimization Auto is enabled in general case. Rx FiF0 Delay Offset Configure Rx FIF0 Delay Offset. Initial RTL (A1 Rank1) Configure round trip latency initial value. Initial RTL (A1 Rank2) Configure round trip latency initial value. Initial RTL (B1 Rank1) Configure round trip latency initial value. Initial RTL (B1 Rank2) Configure round trip latency initial value. RTL (A1 Rank1) Configure round trip latency. H510TM-ITX 41 English

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H510TM-ITX
41
English
tWRRD_dr
Configure between module write to read delay.
tWRRD_dd
Configure between module write to read delay.
tWRWR_sg
Configure between module write to write delay.
tWRWR_dg
Configure between module write to write delay.
tWRWR_dr
Configure between module write to write delay.
tWRWR_dd
Configure between module write to write delay.
Round Trip Timing
Round Trip Timing Optimization
Auto is enabled in general case.
Rx FiF0 Delay Offset
Configure Rx FIF0 Delay Offset.
Initial RTL (A1 Rank1)
Configure round trip latency initial value.
Initial RTL (A1 Rank2)
Configure round trip latency initial value.
Initial RTL (B1 Rank1)
Configure round trip latency initial value.
Initial RTL (B1 Rank2)
Configure round trip latency initial value.
RTL (A1 Rank1)
Configure round trip latency.