ASRock Z690 PG Velocita User Manual - Page 94
ODT CK B2 Group B
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ODT CK (B1 Group B) Configure the memory on die termination resistors' CK for channel B1 Group B. ODT CK (B2 Group B) Configure the memory on die termination resistors' CK for channel B2 Group B. Advanced Setting ASRock Timing Optimization Configure the fast path through the MRC. ASRock Second Timing Optimization Configure the second fast path through the MRC. Realtime Memory Timing Configure the realtime memory timings. [Enabled] The system will allow performing realtime memory timing changes after MRC_DONE. Early Command Training Configure the Early Command Training. Early Command Training is the initial step after reading SPD and configuring DDR interface to desired speed/timings. Read Equalization Training Configure the Read Equalization Training. Reset for MRC Failed Reset system after MRC training is failed. MRC Training on Warm Boot When enabled, memory training will be executed when warm boot. MRC Fast Boot Enable Memory Fast Boot to skip DRAM memory training for booting faster. Voltage Configuration Voltage Mode [OC]: Larger range voltage for overclocking. 86 English
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