Asus KFN5-Q User Guide - Page 87

4.4.4 Chipset The Chipset menu allows you to change the advanced chipset settings. Select an item then press to display the sub-menu. Advanced Chipset Settings WARNING: Setting wrong values in below sections may cause system to malfunction. NorthBridge Configuration SouthBridge/MCP55 Configuration Hyper Transport Configuration Options for NB. NorthBridge Configuration The NorthBridge Configuration menu allows you to change the Northbridge settings. NorthBridge Chipset Configuration Memory Configuration ECC Configuration Power Down Control Alternate VID [Auto] [0.850 V] Memory Timing Parameters [CPU Node 0] Memory CLK : 200 MHz CAS Latency (Tcl) : 3.0 RAS/CAS Delay (Trcd) : 3 CLK Min Active RAS (Tras) : 8 CLK Row Precharge Time (Trp) : 3 CLK RAS/RAS Delay (Trrd) : 2 CLK Row Cycle (Trc) : 13 CLK Asynchronous Latency : 5 ns Select Screen Select Item +- Change Option F1 General Help F10 Save and Exit ESC Exit Memory Configuration The memory configuration menu allows you to change the memory settings. Memory Configuration Memclock Mode MCT Timing Mode Bank Interleaving Enable Clock to All DIMMS DQS Signal Training Control MemClk Tristate C3/ATLVID CS Sparing Enable Memory Hole Remapping [Auto] [Auto] [Auto] [Disabled] [Enabled] [Disabled] [Disabled] [Enabled] ASUS KFN5-D SLI MEMCLK can be set by the code using AUTO, or if you use LIMIT, you can set one of the standard values. Select Screen Select Item +- Change Option F1 General Help F10 Save and Exit ESC Exit 4-21