Dell External OEMR XL R610 Technical Guide - Page 29

DIMM Population Rules

Page 29 highlights

Dell   The first two channels per processor populated identically with the third channel unused o Typically, two channels operate in Advanced ECC (Lockstep) mode with each other by having the cache line split across both channels. o This mode provides improved RAS features (SDDC support for x8-based memory). o For memory mirroring, two channels operate as mirrors of each other (writes go to both channels and reads alternate between the two channels). o For Memory Mirroring or Advanced ECC Mode, the three sockets farthest from the processor are unused and memory modules are installed beginning with socket A2 or B2, proceeding in the following order: A2, A3, A5, and A6. One channel per processor populated o This is a simple Memory Optimized mode. o Mirroring is not supported. 7.2.2 DIMM Population Rules The following DIMM population rules apply:  If DIMMs of different speeds are mixed, all channels will operate at the fastest common frequency. RDIMMs and UDIMMs cannot be mixed.  If memory mirroring is enabled, identical DIMMs must be installed in the same slots across both channels.  The third channel of each processor is unavailable for memory mirroring.  The R610 supports up to 12 DIMMs. DIMMs must be installed in each channel starting with the DIMM slot farthest from the processor. Population order is identified by the silkscreen designator and the System Information Label (SIL) located on the chassis cover.  DIMM slot population for each memory mode is listed as follows: o Memory Optimized: [1, 2, 3], [4, 5, 6] o Advanced ECC or Mirrored: [2, 3], [5, 6] o Quad Rank or UDIMM: [1, 2, 3], [4, 5, 6] 7.3 Speed The memory frequency is determined by a variety of inputs:  Speed of the DIMMs  Speed supported by the processor  Configuration of the DIMMs The memory speed of each channel depends on the memory configuration:  For single- or dual-rank memory modules: o One memory module per channel supports up to 1333 MHz o Two memory modules per channel supports up to 1066 MHz  For quad-rank memory modules: o One memory module per channel supports up to 1066 Mhz o Two memory modules per channel are limited to 800 MHz, regardless of memory module speed If memory modules with different speeds are installed, they will operate at the speed of the slowest installed memory module(s). For quad-rank DIMMs mixed with single- or dual-rank DIMMs, the quad-rank DIMM must be installed in the slot with the white ejection tabs (the first DIMM slot in each channel). There is no requirement for the order of single- and dual-rank DIMMs. PowerEdge R610 Technical Guide 29

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Dell
PowerEdge R610 Technical Guide
29
The first two channels per processor populated identically with the third channel unused
o
Typically, two channels operate in Advanced ECC (Lockstep) mode with each other by
having the cache line split across both channels.
o
This mode provides improved RAS features (SDDC support for x8-based memory).
o
For memory mirroring, two channels operate as mirrors of each other (writes go to
both channels and reads alternate between the two channels).
o
For Memory Mirroring or Advanced ECC Mode, the three sockets farthest from the
processor are unused and memory modules are installed beginning with socket A2 or
B2, proceeding in the following order: A2, A3, A5, and A6.
One channel per processor populated
o
This is a simple Memory Optimized mode.
o
Mirroring is not supported.
7.2.2
DIMM Population Rules
The following DIMM population rules apply:
If DIMMs of different speeds are mixed, all channels will operate at the fastest common
frequency. RDIMMs and UDIMMs cannot be mixed.
If memory mirroring is enabled, identical DIMMs must be installed in the same slots across
both channels.
The third channel of each processor is unavailable for memory mirroring.
The R610 supports up to 12 DIMMs. DIMMs must be installed in each channel starting with the
DIMM slot farthest from the processor. Population order is identified by the silkscreen
designator and the System Information Label (SIL) located on the chassis cover.
DIMM slot population for each memory mode is listed as follows:
o
Memory Optimized: [1, 2, 3], [4, 5, 6]
o
Advanced ECC or Mirrored: [2, 3], [5, 6]
o
Quad Rank or UDIMM: [1, 2, 3], [4, 5, 6]
7.3
Speed
The memory frequency is determined by a variety of inputs:
Speed of the DIMMs
Speed supported by the processor
Configuration of the DIMMs
The memory speed of each channel depends on the memory configuration:
For single- or dual-rank memory modules:
o
One memory module per channel supports up to 1333 MHz
o
Two memory modules per channel supports up to 1066 MHz
For quad-rank memory modules:
o
One memory module per channel supports up to 1066 Mhz
o
Two memory modules per channel are limited to 800 MHz, regardless of memory
module speed
If memory modules with different speeds are installed, they will operate at the speed of the slowest
installed memory module(s).
For quad-rank DIMMs mixed with single- or dual-rank DIMMs, the quad-rank DIMM must be installed in
the slot with the white ejection tabs (the first DIMM slot in each channel). There is no requirement
for the order of single- and dual-rank DIMMs.