Foxconn 560A multilateral manual. - Page 29

K8<->NB HT Width

Page 29 highlights

Chapter 2 BIOS Description 2.6 K8NB HT Width Allows you to set the bandwidth of the link's transmitter of K8NB. 2.7 DRAM Configuration DRAM Configuration Menu Timing Mode This item is used to set DRAM timing mode. The available values setting are: Auto, MaxMemClk. Memory CLK value or Limit W hen "Timing Mode" set to "MaxMemClk", you can select the frequency of memory. DDRII Timing Item This item allows you manually adjust DDRII timing. W hen enabled, you can set some parameters of DDRII timing. TwTr Command Delay Allows you to set the delay that has to be inserted after sending the last data from a write operation to the memory and issuing a read command. Trfc0 for DIMM0 Allows you to set the number of clock cycles of Auto-Refresh command period for DIMM0. Trfc1 for DIMM1 Allows you to set the number of clock cycles of Auto-Refresh command period for DIMM1. (Twr)Write Recovery Time Allows you to set the number of clock cycles taken between writing data and issuing the precharge command. (Trtp)Precharge Time Allows you to set the number of clock cycles of internal write to read command delay. 24

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Chapter 2
BIOS Description
24
2.7 DRAM Configuration
Timing
Mode
This item is used to set DRAM timing mode. The available values setting are:
Auto, MaxMemClk.
Memory CLK value or Limit
When
Timing Mode
set to
MaxMemClk
, you can select the frequency of
memory.
DDRII Timing Item
This item allows you manually adjust DDRII timing. When enabled, you can
set some parameters of DDRII timing.
TwTr Command Delay
Allows you to set the delay that has to be inserted after sending the last data
from a write operation to the memory and issuing a read command.
Trfc0 for DIMM0
Allows you to set the number of clock cycles of Auto-Refresh command
period for DIMM0.
Trfc1 for DIMM1
Allows you to set the number of clock cycles of Auto-Refresh command
period for DIMM1.
(Twr)Write Recovery Time
Allows you to set the number of clock cycles taken between writing data
and issuing the precharge command.
(Trtp)Precharge Time
Allows you to set the number of clock cycles of internal write to read command
delay.
DRAM Configuration Menu
2.6 K8<->NB HT Width
Allows you to set the bandwidth of the link
s transmitter of K8<->NB.