HP 8100 Technical Reference Guide: HP Compaq 8100 Elite Series Business Deskto - Page 30

Intel Processor, 2.1 Intel Processor Features

Get HP 8100 - Elite Convertible Minitower PC PDF manuals and user guides View all HP 8100 manuals
Add to My Manuals
Save this manual to your list of manuals

Page 30 highlights

Processor/Memory Subsystem 3.2 Intel Processor These systems support an Intel Pentium Dual-Core G6950, Core i3, Core i5, or Core i7 processor in an LGA1156 package mounted with a heat sink in a zero-insertion force socket. The mounting socket allows the processor to be easily changed for upgrading. 3.2.1 Intel Processor Features Primary features of the processors supported by these systems include: ■ Execution Trace Cache- A new feature supporting the branch prediction mechanism, the trace cache stores translated sequences of branching micro-operations (ops) and is checked when suspected re-occurring branches are detected in the main processing loop. This feature allows instruction decoding to be removed from the main processing loop. ■ Rapid Execution Engine-Arithmetic Logic Units (ALUs) run at twice (2x) processing frequency for higher throughput and reduced latency. ■ Up to 8 MB of L3 cache-Using a 32-byte-wide interface at processing speed, the large L3 cache provides a substantial increase in processing power over earlier processor versions. ■ Advanced dynamic execution-Using a larger (4K) branch target buffer and improved prediction algorithm, branch mis-predictions are significantly reduced ■ Additional Streaming SIMD extensions (SSE2, SSE3, SSE4.1, and SSE4.2)-In addition to the SSE support provided by earlier processors, the latest processors include additional MMX instructions that enhance the following operations: ❏ Streaming video/audio processing ❏ Photo/video editing ❏ Speech recognition ❏ 3D processing ❏ Encryption processing ■ Integrated dual-channel DDR3 memory controller ■ Direct Media Interface (DMI) bus speeds up to 2.5 GT/s. ■ Flexible Display Inteface (FDI) supporting integrated and/or separate graphcis controllers 3-2 www.hp.com Technical Reference Guide

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
3-2
www.hp.com
Technical Reference Guide
Processor/Memory Subsystem
3.2 Intel Processor
These systems support an Intel Pentium Dual-Core G6950, Core i3, Core i5, or Core i7 processor
in an LGA1156 package mounted with a heat sink in a zero-insertion force socket. The mounting
socket allows the processor to be easily changed for upgrading.
3.2.1 Intel Processor Features
Primary features of the processors supported by these systems include:
■
Execution Trace Cache— A new feature supporting the branch prediction mechanism, the
trace cache stores translated sequences of branching micro-operations (ops) and is checked
when suspected re-occurring branches are detected in the main processing loop.
This feature
allows instruction decoding to be removed from the main processing loop.
■
Rapid Execution Engine—Arithmetic Logic Units (ALUs) run at twice (2x) processing
frequency for higher throughput and reduced latency.
■
Up to 8 MB of L3 cache—Using a 32-byte-wide interface at processing speed, the large L3
cache provides a substantial increase in processing power over earlier processor versions.
■
Advanced dynamic execution—Using a larger (4K) branch target buffer and improved
prediction algorithm, branch mis-predictions are significantly reduced
■
Additional Streaming SIMD extensions (SSE2, SSE3, SSE4.1, and SSE4.2)—In addition to
the SSE support provided by earlier processors, the latest processors include additional
MMX instructions that enhance the following operations:
❏
Streaming video/audio processing
❏
Photo/video editing
❏
Speech recognition
❏
3D processing
❏
Encryption processing
■
Integrated dual-channel DDR3 memory controller
■
Direct Media Interface (DMI) bus speeds up to 2.5 GT/s.
■
Flexible Display Inteface (FDI) supporting integrated and/or separate graphcis controllers