HP 8100 Technical Reference Guide: HP Compaq 8100 Elite Series Business Deskto - Page 42

Direct Memory Access, Table 4-5., PCI Interrupt Distribution - manual

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System Support System Board Connector PCI slot 1 (J20) PCI slot 2 (J21) [1] PCI slot 3 (J22) [1] PIRQ A Table 4-5. PCI Interrupt Distribution System Interrupts PIRQ B PIRQ C PIRQ D PIRQ E PIRQ F A B D A C D PIRQ G C B A PIRQ H D C B NOTES: [1] CMT only The PCI interrupts can be configured by PCI Configuration Registers 60h..63h to share the standard ISA interrupts (IRQn). ✎ The APIC mode is supported by Windows NT, Windows 2000, and Windows XP, Windows Vista, and Windows 7 operating systems. Systems running the Windows 95 or 98 operating system will need to run in 8259 mode. 4.3.2 Direct Memory Access Direct Memory Access (DMA) is a method by which a device accesses system memory without involving the microprocessor. Although the DMA method has been traditionally used to transfer blocks of data to or from an ISA I/O device, PCI devices may also use DMA operation as well. The DMA method reduces the amount of CPU interactions with memory, freeing the CPU for other processing tasks. For detailed information regarding DMA operation, refer to the data manual for the Intel 82801 PCH I/O Controller Hub. 4-8 www.hp.com Technical Reference Guide

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4-8
www.hp.com
Technical Reference Guide
System Support
NOTES:
[1] CMT only
The PCI interrupts can be configured by PCI Configuration Registers 60h..63h to share the
standard ISA interrupts (IRQn).
✎
The APIC mode is supported by Windows NT, Windows 2000, and Windows XP, Windows
Vista, and Windows 7 operating systems. Systems running the Windows 95 or 98 operating
system will need to run in 8259 mode.
4.3.2 Direct Memory Access
Direct Memory Access (DMA) is a method by which a device accesses system memory without
involving the microprocessor. Although the DMA method has been traditionally used to transfer
blocks of data to or from an ISA I/O device, PCI devices may also use DMA operation as well.
The DMA method reduces the amount of CPU interactions with memory, freeing the CPU for
other processing tasks. For detailed information regarding DMA operation, refer to the data
manual for the Intel 82801 PCH I/O Controller Hub.
Table 4-5.
PCI Interrupt Distribution
System Interrupts
System Board
Connector
PIRQ
A
PIRQ
B
PIRQ
C
PIRQ
D
PIRQ
E
PIRQ
F
PIRQ
G
PIRQ
H
PCI slot 1 (J20)
A
B
C
D
PCI slot 2 (J21) [1]
D
A
B
C
PCI slot 3 (J22) [1]
C
D
A
B