HP F8 Architecture
Table of Contents
April 2003
HP Industry
Standard Servers
Technology Brief
TC0304013TB
Abstract
....................................................................................................................
2
Introduction
..............................................................................................................
2
Need for F8 Architecture
...........................................................................................
2
Overview of F8 Chipset
.............................................................................................
4
Hot-Plug RAID Memory
.............................................................................................
5
Memory Configuration
.......................................................................................................
5
RAID Memory Striping
.......................................................................................................
5
Hot-Plug Memory Capabilities
............................................................................................
6
Benefits of Data Protection With RAID
................................................................................
7
Error Detection and Correction
...........................................................................................
7
Architectural Differences From Storage Subsystem RAID
......................................................
8
F8 Crossbar Switch
...................................................................................................
8
Buffer Design
.....................................................................................................................
8
Multiport Design
................................................................................................................
9
Cache Coherency Filter
......................................................................................................
9
Optimizing
Cross-bus Traffic
...........................................................................................
10
I/O Subsystem
........................................................................................................
11
PCI Mode
........................................................................................................................
11
PCI-X Mode
.....................................................................................................................
11
Xeon MP Processor Subsystem
................................................................................
12
Hyper-Threading Technology
...........................................................................................
12
Frequency and Full-Speed Cache
.....................................................................................
13
Processor and I/O Bus Design
..........................................................................................
13
SIMD Instructions
.............................................................................................................
13
Out-of-order Execution
....................................................................................................
13
Branch Prediction
............................................................................................................
13
Conclusion
..............................................................................................................
14
Feedback
................................................................................................................
14