Intel AN430TX Product Specification - Page 15

AB PCI ISA IDE Xcelerator (PIIX4)

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Motherboard Description • Integrated DRAM controller  8 MB to 256 MB main memory  64-Mbit DRAM/SDRAM technology support  3.3V EDO and unbuffered synchronous DRAM support  Non-parity (x64) support only • Fully synchronous minimum latency PCI bus interface  PCI compliance (see Section 5.1 for compliance level)  30 and 33 MHz bus speeds  PCI to DRAM data throughput at greater than 100 MB/sec  Up to four PCI masters in addition to the PIIX4 • Power management control  Provides PCI CLKRUN# signal to control memory clock on the PCI bus (on/off)  Internal clock control (gated off if no host or PCI bus activity) 1.7.2 82371AB PCI ISA IDE Xcelerator (PIIX4) The Intel 82371AB PCI ISA IDE Xcelerator (PIIX4) is a multifunction PCI device implementing a PCI to ISA bridge, PCI IDE functionality, a Universal Serial Bus (USB) host/hub function, and Enhanced Power Management. The PIIX4 comes in a 324-pin MBGA package that features: • Multifunction PCI to ISA bridge  Supports the PCI bus at 30 and 33 MHz  PCI compliant (see section 5.1 for compliance level)  Full ISA or extended I/O (EIO) bus support • USB controller  Two USB ports (see section 5.1 for compliance level)  Supports legacy keyboard and mouse  Supports UHCI design guide revision 1.1 interface • Integrated dual-channel enhanced IDE interface  Support for up to four IDE devices  PIO Mode 4 transfers at up to 14 MB/sec  Supports "Ultra DMA/33" synchronous DMA mode transfers up to 33 MB/sec  Integrated 8 x 32-bit buffer for bus master PCI IDE burst transfers  Bus master mode • Enhanced DMA controller  Two 8237-based DMA controllers  Supports PCI DMA with three PC/PCI channels and distributed DMA protocols  Fast type-F DMA for reduced PCI bus usage • Interrupt controller based on 82C59  Support for 15 interrupts  Programmable for edge/level sensitivity • Power management logic  Sleep/resume logic  Supports thermal alarm  Support for wake on modem through Ring Indicate input 15

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Motherboard Description
15
•
Integrated DRAM controller
8 MB to 256 MB main memory
64-Mbit DRAM/SDRAM technology support
3.3V EDO and unbuffered synchronous DRAM support
Non-parity (x64) support only
•
Fully synchronous minimum latency PCI bus interface
PCI compliance (see Section 5.1 for compliance level)
30 and 33 MHz bus speeds
PCI to DRAM data throughput at greater than 100 MB/sec
Up to four PCI masters in addition to the PIIX4
•
Power management control
Provides PCI CLKRUN# signal to control memory clock on the PCI bus (on/off)
Internal clock control (gated off if no host or PCI bus activity)
1.7.2
82371AB PCI ISA IDE Xcelerator (PIIX4)
The Intel 82371AB PCI ISA IDE Xcelerator (PIIX4) is a multifunction PCI device implementing a
PCI to ISA bridge, PCI IDE functionality, a Universal Serial Bus (USB) host/hub function, and
Enhanced Power Management.
The PIIX4 comes in a 324-pin MBGA package that features:
•
Multifunction PCI to ISA bridge
Supports the PCI bus at 30 and 33 MHz
PCI compliant (see section 5.1 for compliance level)
Full ISA or extended I/O (EIO) bus support
•
USB controller
Two USB ports
(see section 5.1 for compliance level)
Supports legacy keyboard and mouse
Supports UHCI design guide revision 1.1 interface
•
Integrated dual-channel enhanced IDE interface
Support for up to four IDE devices
PIO Mode 4 transfers at up to 14 MB/sec
Supports “Ultra DMA/33” synchronous DMA mode transfers up to 33 MB/sec
Integrated 8 x 32-bit buffer for bus master PCI IDE burst transfers
Bus master mode
•
Enhanced DMA controller
Two 8237-based DMA controllers
Supports PCI DMA with three PC/PCI channels and distributed DMA protocols
Fast type-F DMA for reduced PCI bus usage
•
Interrupt controller based on 82C59
Support for 15 interrupts
Programmable for edge/level sensitivity
•
Power management logic
Sleep/resume logic
Supports thermal alarm
Support for wake on modem through Ring Indicate input