Intel BOXD865GLCL Product Specification - Page 38

Universal 0.8 V / 1.5 V AGP 3.0 Connector

Page 38 highlights

Intel Desktop Board D865GBF/D865GLC Technical Product Specification accessed by an ADD card. ADD cards can support up to two display devices with the following configurations: • TV-Out • Transition Minimized Differential Signaling (TMDS) • Low Voltage Differential Signaling (LVDS) • Single device operating in dual channel mode # INTEGRATOR'S NOTES • Synchronous display is not supported when one of the display devices is a TV. • Synchronous display with two digital displays is not supported. • Digital Visual Interface (DVI) support is present only when an ADD card is installed. 1.8.2 Universal 0.8 V / 1.5 V AGP 3.0 Connector The AGP connector supports the following: • 4x, 8x AGP 3.0 add-in cards with 0.8 V I/O • 1x, 4x AGP 2.0 add-in cards with 1.5 V I/O • AGP Digital Display (ADD) cards AGP is a high-performance interface for graphics-intensive applications, such as 3D applications. While based on the PCI Local Bus Specification, Rev. 2.2, AGP is independent of the PCI bus and is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of the PCI bus related to handling large amounts of graphics data with the following features: • Pipelined memory read and write operations that hide memory access latency • Demultiplexing of address and data on the bus for nearly 100 percent efficiency # INTEGRATOR'S NOTES • AGP 2x operation is not supported. • Install memory in the DIMM sockets prior to installing the AGP video card to avoid interference with the memory retention mechanism. • The AGP connector is keyed for Universal 0.8 V AGP 3.0 cards or 1.5 V AGP 2.0 cards only. Do not attempt to install a legacy 3.3 V AGP card. The AGP connector is not mechanically compatible with legacy 3.3 V AGP cards. For information about The location of the AGP connector on the D865GBF board The location of the AGP connector on the D865GLC board Obtaining the Accelerated Graphics Port Interface Specification Refer to Figure 1, page 14 Figure 2, page 15 Section 1.5, page 18 38

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Intel Desktop Board D865GBF/D865GLC Technical Product Specification
38
accessed by an ADD card.
ADD cards can support up to two display devices with the following
configurations:
TV-Out
Transition Minimized Differential Signaling (TMDS)
Low Voltage Differential Signaling (LVDS)
Single device operating in dual channel mode
#
INTEGRATOR’S NOTES
Synchronous display is not supported when one of the display devices is a TV.
Synchronous display with two digital displays is not supported.
Digital Visual Interface (DVI) support is present only when an ADD card is installed.
1.8.2
Universal 0.8 V / 1.5 V AGP 3.0 Connector
The AGP connector supports the following:
4x, 8x AGP 3.0 add-in cards with 0.8 V I/O
1x, 4x AGP 2.0 add-in cards with 1.5 V I/O
AGP Digital Display (ADD) cards
AGP is a high-performance interface for graphics-intensive applications, such as 3D applications.
While based on the
PCI Local Bus Specification
, Rev. 2.2, AGP is independent of the PCI bus and
is intended for exclusive use with graphical display devices.
AGP overcomes certain limitations of
the PCI bus related to handling large amounts of graphics data with the following features:
Pipelined memory read and write operations that hide memory access latency
Demultiplexing of address and data on the bus for nearly 100 percent efficiency
#
INTEGRATOR’S NOTES
AGP 2x operation is not supported.
Install memory in the DIMM sockets prior to installing the AGP video card to avoid
interference with the memory retention mechanism.
The AGP connector is keyed for Universal 0.8 V AGP 3.0 cards or 1.5 V AGP 2.0 cards only.
Do not attempt to install a legacy 3.3 V AGP card.
The AGP connector is not mechanically
compatible with legacy 3.3 V AGP cards.
For information about
Refer to
The location of the AGP connector on the D865GBF board
Figure 1, page 14
The location of the AGP connector on the D865GLC board
Figure 2, page 15
Obtaining the
Accelerated Graphics Port Interface Specification
Section 1.5, page 18