Intel D845GLLY D845GL_Boards_TechProdSpec - Page 42
Table 19., PCI Interrupt Routing Map
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Technical Product Specification for Intel Desktop Boards using the Intel 845GL Chipset Table 19. PCI Interrupt Routing Map PCI Interrupt Source PIRQA ICH4 USB UHCI controller 1 INTA SMBus controller ICH4 USB UHCI controller 2 AC '97 ICH4 Audio/Modem ICH4 LAN ICH4 USB UHCI controller 3 ICH4 USB 2.0 EHCI controller PCI bus connector 1 PCI bus connector 2 PCI bus connector 3 INTD PCI bus connector 4 PIRQB INTB INTB INTC ICH4 PIRQ Signal Name PIRQC PIRQD PIRQE PIRQF INTB INTC INTA INTA INTB INTB INTA INTD INTC INTA INTB INTC PIRQG INTB INTA INTD PIRQH INTD INTC INTD ✏ NOTE In PIC mode, the ICH4 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6, 7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 18 for the allocation of PIRQ lines to IRQ signals in APIC mode. 42
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