Intel E7500 Design Guide - Page 9

Introduction R 1.2 Definition of Terms Term BGA ICH3-S MBGA MCH FC-BGA P64H2 Tcase-nhs Tdie-nhs Tdie-hs TDP Definition Ball Grid Array. A package type defined by a resin-fiber substrate, onto which a die is mounted, bonded and encapsulated in molding compound. The primary electrical interface is an array of solder balls attached to the substrate opposite the die and molding compound. I/O Controller Hub. The chipset component that contains the primary PCI interface, LPC interface, USB, ATA-33, and other legacy functions. Mini Ball Grid Array. A version of the BGA with a smaller ball pitch. Memory Controller Hub. The chipset component that contains the processor interface and the memory interface. Flip Chip Ball Grid Array. A packaging technology used for the MCH. Bus Controller Hub. The chipset component that interfaces the PCI-X buses. The maximum package case temperature without any package thermal solution. This temperature is measured at the geometric center of the top of the package case. The maximum die temperature without any package thermal solution. This temperature is measured at the geometric center of the top of the package die. The maximum die temperature with the reference thermal solution attached. This temperature is measured at the geometric center of the top of the package die. Thermal Design Power. Thermal solutions should be designed to dissipate this target power level. Intel® E7500 MCH Thermal and Mechanical Design Guidelines 9