Lenovo ThinkPad 560E TP 560Z Technical Reference Manual - Page 131

RT/CMOS address and NMI, I/O operations, RT/CMOS

Page 131 highlights

microprocessor (continued) cache memory operation 2-2 mode switch compatibility 2-29 performance 1-7 real address mode 2-29 specifications 1-3, 1-7 mode switch, protected 2-29 model identifier 1-2 model/submodel bytes 1-2 description 2-2 model identifier 1-2 mouse connector 2-4 signals 2-4 N NMI (nonmaskable interrupt) 2-27 O output protection, power supply 1-11 output voltage sequencing 1-11 overvoltage fault 1-11 P page hit 1-7 page miss 1-7 parallel controller port 1-4 parity check enable 2-28 password, power-on 2-30 PC Card interface 1-6 slots 1-4 subsystem 3-7 Pentium 90/120MHz 1-3 performance, system 1-7 ports parallel 1-4 serial 1-4 system 2-27 POST cache test 2-2 error codes 2-32 POST (continued) memory errors 2-15 parity check 2-27 password 2-30 reset 2-29 ROM test 2-14 power cable 1-8 loss 2-22 power supply 1-10 battery pack (lithium ion) 1-12 connector 1-11 output protection 1-11 output voltages 1-10 outputs 1-10 voltage sequencing 1-11 power-on password 2-30 power-on self-test (POST) cache test 2-2 error codes 2-32 memory errors 2-15 parity check 2-27 password 2-30 reset 2-29 ROM test 2-14 protected mode switch 2-29 R RAM (random access memory) 2-14 I/O operations, RT/CMOS 2-19 subsystem 2-14 RAM subsystem 1-3 read-only memory (ROM) 1-3, 2-14 real mode switch 2-29 real-time clock 2-17 bytes, RT/CMOS 2-20 refresh rate, specifications 1-7 refresh request 2-28 registers miscellaneous system 2-27 RT/CMOS address and NMI mask 2-18 RT/CMOS data 2-18 Index X-3

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microprocessor
(continued)
cache memory operation
2-2
mode switch compatibility
2-29
performance
1-7
real address mode
2-29
specifications
1-3, 1-7
mode switch, protected
2-29
model identifier
1-2
model/submodel bytes
1-2
description
2-2
model identifier
1-2
mouse
connector
2-4
signals
2-4
N
NMI (nonmaskable interrupt)
2-27
O
output protection, power
supply
1-11
output voltage sequencing
1-11
overvoltage fault
1-11
P
page hit
1-7
page miss
1-7
parallel controller port
1-4
parity check enable
2-28
password, power-on
2-30
PC Card
interface
1-6
slots
1-4
subsystem
3-7
Pentium 90/120MHz
1-3
performance, system
1-7
ports
parallel
1-4
serial
1-4
system
2-27
POST
cache test
2-2
error codes
2-32
POST
(continued)
memory errors
2-15
parity check
2-27
password
2-30
reset
2-29
ROM test
2-14
power
cable
1-8
loss
2-22
power supply
1-10
battery pack (lithium ion)
1-12
connector
1-11
output protection
1-11
output voltages
1-10
outputs
1-10
voltage sequencing
1-11
power-on password
2-30
power-on self-test (POST)
cache test
2-2
error codes
2-32
memory errors
2-15
parity check
2-27
password
2-30
reset
2-29
ROM test
2-14
protected mode switch
2-29
R
RAM (random access
memory)
2-14
I/O operations, RT/CMOS
2-19
subsystem
2-14
RAM subsystem
1-3
read-only memory (ROM)
1-3, 2-14
real mode switch
2-29
real-time clock
2-17
bytes, RT/CMOS
2-20
refresh rate, specifications
1-7
refresh request
2-28
registers
miscellaneous system
2-27
RT/CMOS address and NMI
mask
2-18
RT/CMOS data
2-18
Index
X-3