Lenovo ThinkPad 560E TP 560Z Technical Reference Manual - Page 21

Cacheable Address Space, ThinkPad 560Z System Board

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When the microprocessor performs a memory read, the data address is used to find the data in the cache. If the data is found (a hit), it is read from the cache memory and no external bus cycle occurs. If the data is not found (a miss), an external bus cycle is used to read the data from system memory. If the address of the missed data is in a cacheable address space, the data is stored in the cache memory and the remainder of the cache line is read. When the microprocessor performs a memory write, the data address is used to search the cache. If the address is found (a hit), the data is written to the cache and no external bus cycle is used to write the data to system memory. (If the address of the write operation was not in the cache memory but was in cacheable address space, the data is read back into the cache memory and the remainder of the cache line is read.) Cacheable Address Space Cacheable address space is defined as system memory that resides on the system board (0-640 KB and 1 MB-96 MB or 128 MB). Cacheability of system memory is up to 512 MB in the L2 cache, and is up to 4 GB in the on-chip L1 cache. Nothing in address range X'A0000'-X'BFFFF', I/O address space, or memory in any AT slot is cached. ROM address space (X'C0000'-X'C9FFF' and X'F0000'-X'FFFFF') is cacheable for code read operations only. If data in this address range is already in cache memory and the address range is written to, the cached line is invalidated and is read again from RAM (in which the BIOS is shadowed in). ThinkPad 560Z System Board 2-3

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When the microprocessor performs a memory read, the data address
is used to find the data in the cache.
If the data is found (a hit), it is
read from the cache memory and no external bus cycle occurs.
If
the data is not found (a miss), an external bus cycle is used to read
the data from system memory.
If the address of the missed data is
in a cacheable address space, the data is stored in the cache
memory and the remainder of the cache line is read.
When the microprocessor performs a memory write, the data
address is used to search the cache.
If the address is found (a hit),
the data is written to the cache and no external bus cycle is used to
write the data to system memory.
(If the address of the write
operation was not in the cache memory but was in cacheable
address space, the data is read back into the cache memory and the
remainder of the cache line is read.)
Cacheable Address Space
Cacheable address space is defined as system memory that resides
on the system board (0–640 KB and 1 MB–96 MB or 128 MB).
Cacheability of system memory is up to 512 MB in the L2 cache, and
is up to 4 GB in the on-chip L1 cache.
Nothing in address range
X
'
A0000
'
–X
'
BFFFF
'
, I/O address space, or memory in any AT slot
is cached.
ROM address space (X
'
C0000
'
–X
'
C9FFF
'
and
X
'
F0000
'
–X
'
FFFFF
'
) is cacheable for
code read operations only
. If
data in this address range is already in cache memory and the
address range is written to, the cached line is invalidated and is read
again from RAM (in which the BIOS is shadowed in).
ThinkPad 560Z System Board
2-3