MSI Keeper User Guide - Page 32

MS-9641 Mainboard, Signal Action, Bit Definition

Page 32 highlights

MS-9641 Mainboard Signal Action Segment Segment 1 Segment 2 Segment 3 Segment 4 Signal Name RELAY_SET1# RESET_RESET1# BYPASS1_LED# RELAY_SET2# RESET_RESET2# BYPASS2_LED# RELAY_SET3# RESET_RESET3# BYPASS3_LED# RELAY_SET4# RESET_RESET4# BYPASS4_LED# D esc ription Enable LAN1 bypass Enable LAN1 bypass Enable LAN1 bypass LED Enable LAN2 bypass Enable LAN2 bypass Enable LAN2 bypass LED Enable LAN3 bypass Enable LAN3 bypass Enable LAN3 bypass LED Enable LAN4 bypass Enable LAN4 bypass Enable LAN4 bypass LED Type Output Output Output Output Output Output Output Output Output Output Output Output Bypass 1 0 1 1 0 1 1 0 1 1 0 1 Pass Through 0 1 0 0 1 0 0 1 0 0 1 0 2. W DTO# to Bypass Control Mask Register Mask WDTO# input for bypass mode W hen W DTO# pin inputs 0, watchdog timeout occurs. This register sets watchdog timeout behavior for Segment 1~4. WDTO# - Input from Super I/O WDTO# Default Value: 0x00 WDTO# to Bypass Control Mask Register 7 6 5 4 3 2 1 0 X R/W R/W R/W R/W R/W R/W R/W GPIO sel SMI Reset Path sel Segment 4 Segment 3 Segment 2 Segment 1 WDTO# Input 0 0 1 Segment bit (bit 0~4) 1 0 X Mode No Change Bypass No Change Bit Definition Bit Field 3:0 4 5 6 7 2-20 WDTO# to Bypass Control Mask Register Name Value Segment WDTO# to Bypass Control Segment bit mask. Each bit 1 to 4 corresponds to a specific segment numbered 1 thru 4. Read/Write: 1: When WDTO# active, then set Segment Bypass Mode Path sel 0: When WDTO# active, no action 0:LPC Control LAN 1:GPIO Control LAN reserved reserved GPIO sel 0:GPIO38 and GPIO39 :control LAN1,LAN2 (1→ BYPASS 0→Pass Through) 1:GPIO38 control LAN1,GPIO39 control LAN2 : (GPIO38:1→ BYPASS 0→Pass Through GPIO39:1→ BYPASS 0→Pass Through)

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MS-9641 Mainboard
2-20
Signal Action
Segment
Signal Name
Description
Type
Bypass
Pass Through
RELAY_SET1#
Enable LAN1 bypass
Output
1
0
RESET_RESET1#
Enable LAN1 bypass
Output
0
1
Segment 1
BYPASS1_LED#
Enable LAN1 bypass LED
Output
1
0
RELAY_SET2#
Enable LAN2 bypass
Output
1
0
RESET_RESET2#
Enable LAN2 bypass
Output
0
1
Segment 2
BYPASS2_LED#
Enable LAN2 bypass LED
Output
1
0
RELAY_SET3#
Enable LAN3 bypass
Output
1
0
RESET_RESET3#
Enable LAN3 bypass
Output
0
1
Segment 3
BYPASS3_LED#
Enable LAN3 bypass LED
Output
1
0
RELAY_SET4#
Enable LAN4 bypass
Output
1
0
RESET_RESET4#
Enable LAN4 bypass
Output
0
1
Segment 4
BYPASS4_LED#
Enable LAN4 bypass LED
Output
1
0
2. WDTO# to Bypass Control Mask Register
Mask WDTO# input for bypass mode
When WDTO# pin inputs 0, watchdog timeout occurs. This register sets watchdog
timeout behavior for Segment 1~4.
WDTO# - Input from Super I/O WDTO#
Default Value: 0x00
WDTO# to Bypass Control Mask Register
7
6
5
4
3
2
1
0
X
R/W
R/W
R/W
R/W
R/W
R/W
R/W
GPIO sel
SMI
Reset
Path sel
Segment 4
Segment 3
Segment 2
Segment 1
WDTO# Input
Segment bit (bit 0
~
4)
Mode
0
1
No Change
0
0
Bypass
1
X
No Change
Bit Definition
WDTO# to Bypass Control Mask Register
Bit Field
Name
Value
3
0
Segment
1 to 4
WDTO# to Bypass Control Segment bit mask. Each bit
corresponds to a specific segment numbered 1 thru 4.
Read/Write
1: When WDTO# active, then set Segment Bypass Mode
0: When WDTO# active, no action
4
Path sel
0
LPC Control LAN
1
GPIO Control LAN
5
reserved
6
reserved
7
GPIO sel
0
GPIO38 and GPIO39
control LAN1
LAN2
1
BYPASS 0
Pass Through
1
GPIO38 control LAN1
GPIO39 control LAN2
GPIO38
1
BYPASS
0
Pass Through
GPIO39
1
BYPASS 0
Pass Through