Asus K7M K7M User Manual - Page 59

ASUS K7M User's Manual, Con SDRAM Timing by SPD, Config, ure SDRAM Timing by SPD, Con

Get Asus K7M - Motherboard - ATX PDF manuals and user guides View all Asus K7M manuals
Add to My Manuals
Save this manual to your list of manuals

Page 59 highlights

4. BIOS SETUP Precharge Time This controls the idle clocks after issuing a precharge command to the SDRAM. NOTE: To make changes to this field, the Configure SDRAM Timing by SPD field must be set to [Disabled]. Available options: [3 Cycles] [2 Cycles] [1 Cycle] RAS Active Time This specifies the minimum bank active time. NOTE: To make changes to this field, the Configure SDRAM Timing by SPD field must be set to [Disabled]. Available options: [2 Cycles] [3 Cycles] [4 Cycles] [5 Cycles] [6 Cycles] [7 Cycles] CAS Latency This controls the latency between the SDRAM read command and the time that the data actually becomes available. NOTE: To make changes to this field, the Configure SDRAM Timing by SPD field must be set to [Disabled]. Available options: [3 Cycles] [2 Cycles] [4 Cycles] RAS-to-CAS Delay This controls the latency between the SDRAM active command and the read/write command. NOTE: To make changes to this field, the Configure SDRAM Timing by SPD field must be set to [Disabled]. Available options: [1 Cycle] [2 Cycles] [3 Cycles] [4 Cycles] DRAM Integrity Mode [Disabled] [ECC] with hardware scrubbing allows the detection of single-bit and multiple-bit errors and recovery of single-bit errors. This field is available only if your DIMMs have ECC. Available options: [Disabled] [ECC] DRAM Burst Refresh [Enabled] This controls the queuing of refresh requests. When [Enabled], up to four refresh requests are queued before being sent to the memory controller. When [Disabled], refresh requests are only queued if memory requests are currently being serviced. Graphics Aperture Size [64MB] This feature allows you to select the size of mapped memory for AGP graphic data. Available options: [32MB] [64MB] [128MB] [256MB] [512MB] [1GB] Memory Hole [Disabled] This allows you to specify the memory address space to be reserved for ISA expansion cards that specifically require this setting. Setting the address space to a particular setting will make that memory space unavailable to the system. Expansion cards can only access memory up to 16MB. Available options: [Disabled] [14MB15MB] [15MB-16MB] [14MB-16MB] 4. BIOS SETUP Advanced Chipset ASUS K7M User's Manual 59

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
ASUS K7M User’s Manual
59
4. BIOS SETUP
4. BIOS SETUP
Advanced Chipset
Precharge Time
This controls the idle clocks after issuing a precharge command to the SDRAM.
NOTE:
To make changes to this field, the
Configure SDRAM Timing by SPD
field must be set to [Disabled]. Available options: [3 Cycles] [2 Cycles] [1 Cycle]
RAS Active Time
This specifies the minimum bank active time.
NOTE:
To make changes to this field,
the
Configure SDRAM Timing by SPD
field must be set to [Disabled]. Available
options: [2 Cycles] [3 Cycles] [4 Cycles] [5 Cycles] [6 Cycles] [7 Cycles]
CAS Latency
This controls the latency between the SDRAM read command and the time that the
data actually becomes available.
NOTE:
To make changes to this field, the
Config-
ure SDRAM Timing by SPD
field must be set to [Disabled]. Available options: [3
Cycles] [2 Cycles] [4 Cycles]
RAS-to-CAS Delay
This controls the latency between the SDRAM active command and the read/write
command.
NOTE:
To make changes to this field, the
Configure SDRAM Timing
by SPD
field must be set to [Disabled]. Available options: [1 Cycle] [2 Cycles] [3
Cycles] [4 Cycles]
DRAM Integrity Mode [Disabled]
[ECC] with hardware scrubbing allows the detection of single-bit and multiple-bit
errors and recovery of single-bit errors. This field is available only if your DIMMs
have ECC. Available options: [Disabled] [ECC]
DRAM Burst Refresh [Enabled]
This controls the queuing of refresh requests. When [Enabled], up to four refresh
requests are queued before being sent to the memory controller. When [Disabled],
refresh requests are only queued if memory requests are currently being serviced.
Graphics Aperture Size [64MB]
This feature allows you to select the size of mapped memory for AGP graphic data.
Available options: [32MB] [64MB] [128MB] [256MB] [512MB] [1GB]
Memory Hole [Disabled]
This allows you to specify the memory address space to be reserved for ISA expan-
sion cards that specifically require this setting. Setting the address space to a par-
ticular setting will make that memory space unavailable to the system. Expansion
cards can only access memory up to 16MB. Available options: [Disabled] [14MB-
15MB] [15MB-16MB] [14MB-16MB]