Intel D875PBZ Product Guide - Page 73

Using the BIOS Setup Program Table 21. Chipset Configuration Submenu (continued) Feature Burn-In Mode Extended Configuration Chipset Memory Timing Control Graphics Core Frequency SDRAM Frequency SDRAM Timing Control Options • Default (default) • -2.0% • -1.0% • +1.0% • +2.0% • +3.0% • +4.0% • Default (default) • User Defined No option • Auto (default) • 266 MHz • 333-320 MHz • Auto (default) • 266 MHz • 333 MHz • 400 MHz • Auto (default) • Manual - Aggressive • Manual - User Defined CPC Override • Auto (default) • Enabled • Disabled SDRAM RAS Act. To Pre. • 8 (default) • 7 • 6 • 5 SDRAM CAS# Latency • 2.0 • 2.5 • 3.0 (default) SDRAM RAS# to CAS# delay • 4 • 3 (default) • 2 SDRAM RAS# Precharge • 4 • 3 (default) • 2 Description Alters host and I/O clock frequencies. Chooses the default or user defined settings for the extended configuration options. Allows override of detected graphics core frequency value. Allows override of detected memory frequency value. Auto allows timings to be programmed according to the memory detected. Manual - Aggressive selects the most aggressive user defined timings. Manual - User Defined allows manual override of detected SDRAM settings. Controls Command Per Clock/1n rule mode. When enabled, allows DRAM controller to attempt Chip Select assertions in two consecutive common clocks. Selects length of time from read to pre-change. Corresponds to tRAS, min. Selects the number of clock cycles required to address a column in memory. Corresponds to CL. Selects the number of clock cycles between addressing a row and addressing a column. Corresponds to tRCD. Selects the length of time required before accessing a new row. 73