AIWA CDC-X227 Service Manual - Page 32

IC, LC78622NE - mute

Page 32 highlights

IC, LC78622NE Pin No. Pin Name 1 DEFI 2 TAI 3 PDO 4 VVSS 5 ISET 6 VVDD 7 FR 8 VSS 9 EFMO 10 EFMIN 11 TEST2 12,13 CLV+,CLV- 14 V/P 15 HFL 16 TES 17 TOFF 18 TGL 19 JP+ 20 JP- 21 PCK 22 FSEQ 23 24 ~ 28 29 30 31 32 33 VDD CONT1 ~ 5 EMPH C2F DOUT TEST3 TEST4 34 PCCL 35 LMUTE 36 LVDD 37 LOUT 38 LVSS 39 RVSS 40 ROUT 41 RVDD I/O Description I Defect detection signal (DEF) input. (Must be connected to 0V when not in used.) I For PLL/Test input. A pull-down resistor is built-in. (Must be connected to 0V.) O External VCO control phase comparator output. - Internal VCO ground. (Must be connected to 0V.) I PDO output current adjustment resistor connection. - Internal VCO power supply. I VCO frequency range adjustment. - Digital system ground. (Must be connected to 0V.) O Slice level control EFM signal output. I Slice level control EFM signal input. I Test input. A pull-down resistor is built-in. (Must be connected to 0V.) O Disc motor control output. Can be set to three-value output by microprocessor command. Rough servo/phase control automatic switching monitor output. Output a high level during O rough servo a low level. I Track detection signal input. This is a Schmitt input. I Tracking error signal input. This is a Schmitt input. O Tracking off output. O Tracking gain switching output. Increase the gain when low. Track jump output. Three value output is also possible when specified by microprocessor O command. O EFM data playback clock monitor. Output 4.3218 MHz when the phase is locked. (Not used) Synchronization signal detection output. Output a high level when the synchronization signal O detected from the EFM signal and the internaly generated synchronization signal range.(Not used) - Digital system power supply. I/O General purpose input/ output pin 1 ~ 5. (Not used) O De-emphasis monitor. A high level indicates playback of a De-emphasis disc. (Not used) O C2 flag output. (Not used) O Digital output. (Not used) I Test input. A pull-down resistor is built-in. (Must be connected to 0V.) I Test input. A pull-down resistor is built-in. (Must be connected to 0V.) General purpose input/output command identifying. A pull-down resistor is built-in. I "H": Control possible only for the general purpose input/ output port command. "L": Control possible for all commands. (Must be connected to 0V.) O Left channel mute output. (Not used) - Left channel power supply. O Left channel output. - Left channel ground. (Must be connected to 0V.) - Right channel ground. (Must be connected to 0V.) O Right channel output. - Right channel power supply. - 32 -

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Pin No.
Pin Name
I/O
Description
1
DEFI
I
Defect detection signal (DEF) input. (Must be connected to 0V when not in used.)
2
TAI
I
For PLL/Test input. A pull-down resistor is built-in. (Must be connected to 0V.)
3
PDO
O
External VCO control phase comparator output.
4
VVSS
-
Internal VCO ground. (Must be connected to 0V.)
5
ISET
I
PDO output current adjustment resistor connection.
6
VVDD
-
Internal VCO power supply.
7
FR
I
VCO frequency range adjustment.
8
VSS
-
Digital system ground. (Must be connected to 0V.)
9
EFMO
O
Slice level control EFM signal output.
10
EFMIN
I
Slice level control EFM signal input.
11
TEST2
I
Test input. A pull-down resistor is built-in. (Must be connected to 0V.)
12,13
CLV+,CLV-
O
Disc motor control output. Can be set to three-value output by microprocessor command.
14
V/P
O
Rough servo/phase control automatic switching monitor output. Output
a high level during
rough servo a low level.
15
HFL
I
Track detection signal input. This is a Schmitt input.
16
TES
I
Tracking error signal input. This is a Schmitt input.
17
TOFF
O
Tracking off output.
18
TGL
O
Tracking gain switching output. Increase the gain when low.
19
JP+
O
Track jump output. Three value output is also possible when specified by microprocessor
20
JP-
command.
21
PCK
O
EFM data playback clock monitor. Output 4.3218 MHz when the phase is locked. (Not used)
22
FSEQ
O
Synchronization signal detection output. Output a high level when the synchronization signal
detected from the EFM signal and the internaly generated synchronization signal range.(Not used)
23
VDD
-
Digital system power supply.
24 ~ 28
CONT1 ~ 5
I/O
General purpose input/ output pin 1 ~ 5. (Not used)
29
EMPH
O
De-emphasis monitor. A high level indicates playback of a De-emphasis disc. (Not used)
30
C2F
O
C2 flag output. (Not used)
31
DOUT
O
Digital output. (Not used)
32
TEST3
I
Test input. A pull-down resistor is built-in. (Must be connected to 0V.)
33
TEST4
I
Test input. A pull-down resistor is built-in. (Must be connected to 0V.)
General purpose input/output command identifying. A pull-down resistor is built-in.
34
PCCL
I
"H": Control possible only for the general purpose input/ output port command.
"L": Control possible for all commands. (Must be connected to 0V.)
35
LMUTE
O
Left channel mute output. (Not used)
36
LVDD
-
Left channel power supply.
37
LOUT
O
Left channel output.
38
LVSS
-
Left channel ground. (Must be connected to 0V.)
39
RVSS
-
Right channel ground. (Must be connected to 0V.)
40
ROUT
O
Right channel output.
41
RVDD
-
Right channel power supply.
IC, LC78622NE
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