AIWA CDC-X227 Service Manual - Page 33

AIWA CDC-X227 Manual

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Pin No. 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Pin Name RMUTE XVDD XOUT XIN XVSS SBSY EFLG PW SFSY SBCK FSX WRQ RWC SQOUT COIN CQCK RES TST11 16M 4.2M TEST5 CS TEST1 I/O Description O Right channel mute output. (Not used) - Crystal oscillator power supply. O Connection for a 16.93 MHz crystal oscillator element. I - Crystal oscillator ground. (Must be connected to 0V.) O Subcode clock synchronization signal output. (Not used) O C1, C2, sigle an double error correction monitor. (Not used) O Subcode P, Q, R, S, T, U and W output. (Not used) Subcode frame synchronization signal output. This signal falls when the subcode are in standby O state. (Not used) I Subcode read out clock input. This is a Schmitt input. (Must be connected to 0 V.) O Output pin for the 7.35 kHZ synchronization signal divided from the crystal oscillator. (Not used) O Subcode Q output standby output. I Read/write control input. This is a Schmitt input. O Subcode Q output. I Command input pin from control microprocessor. Input for both the command input acquisition clock and the SQOUT pin subcode I readout clock input pin. This is Schmitt input. I Reset input. This pin must be set low briefly after power is first applied. O Test output. Leave open. (Normally output a low level.) (Not used.) O 16.9344 MHz output. (Not used.) O 4.2336 MHz output. I Test input. A pull-down resistor is built-in. (Must be connected to 0V.) Chip select input. A pull-down resistor is built-in. I (Must be connected to 0 V.) I Test input. No pull-down resistor. (Must be connected to 0V.) - 33 -

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Pin No.
Pin Name
I/O
Description
42
RMUTE
O
Right channel mute output. (Not used)
43
XVDD
-
Crystal oscillator power supply.
44
XOUT
O
Connection
for a 16.93 MHz crystal oscillator element.
45
XIN
I
46
XVSS
-
Crystal oscillator ground. (Must be connected to 0V.)
47
SBSY
O
Subcode clock synchronization signal output. (Not used)
48
EFLG
O
C1, C2, sigle an double error correction monitor.
(Not used)
49
PW
O
Subcode P, Q, R, S, T, U and W output.
(Not used)
50
SFSY
O
Subcode frame synchronization signal output. This signal falls when the subcode are in standby
state.
(Not used)
51
SBCK
I
Subcode read out clock input. This is a Schmitt input. (Must be connected to 0 V.)
52
FSX
O
Output pin for the 7.35 kHZ synchronization signal divided from the crystal oscillator. (Not used)
53
WRQ
O
Subcode Q output standby output.
54
RWC
I
Read/write control input. This is a Schmitt input.
55
SQOUT
O
Subcode Q output.
56
COIN
I
Command input pin from control microprocessor.
57
CQCK
I
Input for both the command input acquisition clock and the SQOUT pin subcode
readout clock input pin. This is Schmitt input.
58
RES
I
Reset input. This pin must be set low briefly after power is first applied.
59
TST11
O
Test output. Leave open. (Normally output a low level.) (Not used.)
60
16M
O
16.9344 MHz output. (Not used.)
61
4.2M
O
4.2336 MHz output.
62
TEST5
I
Test input. A pull-down resistor is built-in. (Must be connected to 0V.)
63
CS
I
Chip select input. A pull-down resistor is built-in.
(Must be connected to 0 V.)
64
TEST1
I
Test input. No pull-down resistor. (Must be connected to 0V.)
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