Asus COMMANDO Commando User's Manual for English Edtion - Page 87

ASUS C.G.I. [Auto], Static Read Control [Auto]

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SB Chipset Voltage [Auto] Allows you to select the SB chipset voltage. Configuration options: [Auto] [1.050V] [1.075V] [1.100V] [1.125V] [1.150V] [1.175V] [1.200V] [1.225V] 4.4.2 ASUS C.G.I. [Auto] Allows you to set ASUS C.G.I. Configuration options: [Auto] [Enabled] [Disabled] 4.4.3 Static Read Control [Auto] Allows you to set Static Read Control Configuration options: [Disabled] [Auto] [Fast] [Faster] 4.4.4 Configure DRAM Timing by SPD [Enabled] When this item is enabled, the DRAM timing parameters are set according to the DRAM SPD (Serial Presence Detect). When disabled, you can manually set the DRAM timing parameters through the DRAM sub-items. The following sub-items appear when this item is set to [Disabled]. Configuration options: [Enabled] [Disabled] DRAM CAS# Latency [5] Controls the latency between the SDRAM read command and the time the data actually becomes available. Configuration options: [3] [4] [5] [6] DRAM RAS# to CAS# Delay [6 DRAM Clocks] Controls the latency between the DDR SDRAM active command and the read/write command. Configuration options: [2 DRAM Clocks]~[6 DRAM Clocks] DRAM RAS# Precharge [6DRAM Clocks] Controls the idle clocks after issuing a precharge command to the DDR SDRAM. Configuration options: [2 DRAM Clocks]~[6 DRAM Clocks] DRAM RAS# Activate to Precharge Delay [15 DRAM Clocks] Configuration options: [4 DRAM Clocks]~[18 DRAM Clocks] DRAM Write Recovery Time [6 DRAM Clocks] Configuration options: [2 DRAM Clocks]~[6 DRAM Clocks] DRAM TRFC [42 DRAM Clocks] Configuration options: [20 DRAM Clocks] [25 DRAM Clocks] [30 DRAM Clocks] [35 DRAM Clocks] [42 DRAM Clocks] ASUS Commando 4-19

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ASUS Commando
4-±9
SB Chipset Voltage [Auto]
Allows you to select the SB chipset voltage.
Configuration options: [Auto] [1.050V] [1.075V] [1.100V] [1.125V] [1.150V] [1.175V]
[1.200V] [1.225V]
4.4.2
ASUS C.G.I. [Auto]
Allows you to set ASUS C.G.I. Configuration options: [Auto] [Enabled] [Disabled]
4.4.3
Static Read Control [Auto]
Allows you to set Static Read Control Configuration options:
[Disabled] [Auto]
[Fast] [Faster]
4.4.4
Configure DRAM Timing by SPD [Enabled]
When this item is enabled, the DRAM timing parameters are set according to the
DRAM SPD (Serial Presence Detect). When disabled, you can manually set the
DRAM timing parameters through the DRAM sub-items. The following sub-items
appear when this item is set to [Disabled].
Configuration options: [Enabled] [Disabled]
DRAM CAS# Latency [5]
Controls the latency between the SDRAM read command and the time the data
actually becomes available. Configuration options: [3] [4] [5] [6]
DRAM RAS# to CAS# Delay [6 DRAM Clocks]
Controls the latency between the DDR SDRAM active command and the read/write
command. Configuration options: [2 DRAM Clocks]~[6 DRAM Clocks]
DRAM RAS# Precharge [6DRAM Clocks]
Controls the idle clocks after issuing a precharge command to the DDR SDRAM.
Configuration options: [2 DRAM Clocks]~[6 DRAM Clocks]
DRAM RAS# Activate to Precharge Delay [15 DRAM Clocks]
Configuration options: [4 DRAM Clocks]~[18 DRAM Clocks]
DRAM Write Recovery Time [6 DRAM Clocks]
Configuration options: [2 DRAM Clocks]~[6 DRAM Clocks]
DRAM TRFC [42 DRAM Clocks]
Configuration options: [20 DRAM Clocks] [25 DRAM Clocks] [30 DRAM Clocks]
[35 DRAM Clocks] [42 DRAM Clocks]