Asus P3C2000 P3C20000 User Manual - Page 68
Chip Configuration
View all Asus P3C2000 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 68 highlights
4. BIOS SETUP 4.4.1 Chip Configuration 4. BIOS SETUP Chip Configuration SDRAM Configuration [By SPD] This sets the optimal timings for items 2-4, depending on the memory modules that you are using. Default setting is [By SPD], which configures items 2-4 by reading the contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module stores critical parameter information about the module, such as memory type, size, speed, voltage interface, and module banks. Configuration options: [User Define] [By SPD] SDRAM CAS Latency This controls the latency between the SDRAM read command and the time that the data actually becomes available. NOTE: This field will only be displayed when SDRAM Configuration is set to [User Define]. SDRAM RAS to CAS Delay This controls the latency between the SDRAM active command and the read/write command. NOTE: This field will only be displayed when SDRAM Configuration is set to [User Define]. SDRAM RAS Precharge Time This controls the idle clocks after issuing a precharge command to the SDRAM. NOTE: This field will only be displayed when SDRAM Configuration is set to [User Define]. 68 ASUS P3C2000 User's Manual